THS6132_14 Datasheet, PDF (12/26 Pages) Texas Instruments – HIGH EFFICIENCY CLASS-G ADSL LINE DRIVER

THS6132
SLLS543A − SEPTEMBER 2002 − REVISED FEBRUARY 2003
SHUTDOWN RESPONSE
6
5
4
3
Output Voltage
V−SHDN
2
VCCH = ±15V
1 VCCL = ±5V
Gain = 5
0 ^{VIN = 1 Vdc}
Rload = 100 Ω
−1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t − Time − ns
Figure 32
INPUT OFFSET VOLTAGE
vs
TEMPERATURE
0.2
VCCH = ±15V
0
VCCL = ±5V
−0.2
−0.4
Vio − Channel A
−0.6
−0.8
−1
Vio − Channel B
−1.2
−1.4
−40 −20 0 20 40 60 80 100
T − Temperature − °C
Figure 35
OUTPUT VOLTAGE
vs
TEMPERATURE
14.5
14
VCCH= ±15 V, Rl = 100 Ω
13.5
VCCH= ±15 V, Rl = 50 Ω
13
12.5
12
11.5
VCCH= ±12 V, Rl = 100 Ω
11
10.5
10
VCCH= ±12 V, Rl = 30 Ω
9.5
−40 −20 0
20 40 60 80 100
T − Temperature − °C
Figure 38
COMMON-MODE REJECTION RATIO
vs
COMMON-MODE INPUT VOLTAGE
80
−40°C
70
60
85°C
50
25°C
40
30
20
10
VCCH = ±15V
VCCL = ±5V
0
−4 −3 −2 −1 0 1 2 3 4
Common-Mode Input Voltage − ±VCCL
Figure 33
CURRENT DRAW DISTRIBUTION
vs
OUTPUT VOLTAGE
100
VCCH= ±15 V
Rload = 25 Ω
80
Gain = 10
f = 1 MHz
60
40 ^{VCCL= ±5 V}
VCCL= ±7.5 V
20 _{VCCL= ±6 V}
0
01 2345 67
Output Voltage − VRMS
Figure 36
DIFFERENTIAL DISTORTION
vs
FREQUENCY
−20
Gain =10
−30 _{Full Bias}
−40 ^{VO = 2 VPP}
Rf = 1 kΩ
−50 RL= 100 Ω
−60
HD3
−70
−80
HD2
−90
−100
−110
100 k
VCCH= ±15 V
VCCL= ±5 V
1M
10 M
f − Frequency − Hz
100 M
Figure 39
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INPUT BIAS CURRENT
vs
TEMPERATURE
0.5
VCCH = ±15V
lib−
VCCL = ±5V
0
−0.5
−1
lib+
−1.5
−2
−40 −20 0 20 40 60 80 100
T − Temperature − °C
Figure 34
CURRENT DRAW DISTRIBUTION
vs
OUTPUT VOLTAGE
100
VCCL= ±5 V
80
VCCL= ±6 V
60
VCCL= ±7.5 V
40
20
0
0
VCCH= ±15 V
Rload = 25 Ω
Gain = 10
f = 1 MHz
1234 56 7
Output Voltage − VRMS
Figure 37
DIFFERENTIAL DISTORTION
vs
FREQUENCY
−20
Gain =10
−30 _{Mid Bias}
−40 ^{VO = 2 VPP}
Rf = 1 kΩ
−50 RL= 100 Ω
−60
HD3
−70
−80 HD2
−90
−100
−110
100 k
VCCH= ±15 V
VCCL= ±5 V
1M
10 M
f − Frequency − Hz
100 M
Figure 40
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