ADC12130_14 Datasheet, PDF (6/52 Pages) Texas Instruments – ADC12130/ADC12132/ADC12138 Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold

ADC12130, ADC12132, ADC12138
SNAS098G – MARCH 2000 – REVISED MARCH 2013
www.ti.com
Package Thermal Resistance
Part Number
ADC12130CIN
ADC12130CIWM
ADC12132CIMSA
ADC12132CIWM
ADC121038CIN
ADC121038CIMSA
ADC12138CIWM
Thermal Resistance (θ_JA)
53°C/W
70°C/W
134°C/W
64°C/W
40°C/W
97°C/W
50°C/W
Some of these product/package combinations are obsolete and are shown here for reference only. Check the TI
web site for availability.
Converter Electrical Characteristics
The following specifications apply for (V⁺ = V_A+ = V_D+ = +5V, V_REF+ = +4.096V, and fully differential input with fixed 2.048V
common-mode voltage) or (V⁺ = V_A+ = V_D+ = 3.3V, V_REF+ = 2.5V and fully-differential input with fixed 1.250V common-mode
voltage), V_REF− = 0V, 12-bit + sign conversion mode⁽¹⁾, source impedance for analog inputs, V_REF^− and V_REF+ ≤ 25Ω, f_CK = f_SK
= 5 MHz, and 10 (t_CK) acquisition time unless otherwise specified. Boldface limits apply for T_A = T_J = T_MIN to T_MAX; all other
limits T_A = T_J = 25°C. ^(2)(3)(4)
Parameter
Test Conditions
Typical ⁽⁵⁾
Limits ⁽⁶⁾
Units
(Limits)
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes
ILE
Integral Linearity Error
After Auto Cal ^{(7) (8)}
12 + sign Bits (min)
±1/2
±2
LSB (max)
DNL
Differential Non-Linearity
Positive Full-Scale Error
Negative Full-Scale Error
Offset Error
After Auto Cal
After Auto Cal ^{(7) (8)}
After Auto Cal ⁽⁷⁾⁽⁸⁾
After Auto Cal ⁽⁹⁾⁽⁸⁾
V_IN(+) = V_IN(−) = 2.048V
±1.5 LSB (max)
±1/2
±3.0 LSB (max)
±1/2
±3.0 LSB (max)
±1/2
±2
LSB (max)
(1) The “12-Bit Conversion of Offset” and “12-Bit Conversion of Full-Scale” modes are intended to test the functionality of the device.
Therefore, the output data from these modes are not an indication of the accuracy of a conversion result.
(2) Two on-chip diodes are tied to each analog input through a series resistor as shown below. Input voltage magnitude up to 5V above V_A+
or 5V below GND will not damage this device. However, errors in conversion can occur (if these diodes are forward biased by more than
50 mV) if the input voltage magnitude of selected or unselected analog input go above V_A+ or below GND by more than 50 mV. As an
example, if V_A+ is 4.5 V_DC, full-scale input voltage must be ≤4.55 V_DC to ensure accurate conversions.
(3) To ensure accuracy, it is required that the V_A+ and V_D+ be connected together to the same power supply with separate bypass
capacitors at each V⁺ pin.
(4) With the test condition for V_REF (V_REF+ − V_REF−) given as +4.096V, the 12-bit LSB is 1.0 mV. For V_REF = 2.5V, the 12-bit LSB is 610 μV.
(5) Typical figures are at T_J = T_A = 25°C and represent most likely parametric norm.
(6) Tested limits are specified to TI's AOQL (Average Outgoing Quality Level).
(7) Positive integral linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes
through positive full-scale and zero. For negative integral linearity error, the straight line passes through negative full-scale and zero
(see Figure 5 and Figure 6).
(8) The ADC12130 family's self-calibration technique ensures linearity and offset errors as specified, but noise inherent in the self-
calibration process will result in a maximum repeatability uncertainty of 0.2 LSB.
(9) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
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