TM4C1232H6PM Datasheet, PDF (587/1172 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1232H6PM Microcontroller
9.2.1.2
direction bit is set, the GPIO is configured as an output, and the corresponding data register bit is
driven out on the GPIO port.
Data Register Operation
To aid in the efficiency of software, the GPIO ports allow for the modification of individual bits in the
GPIO Data (GPIODATA) register (see page 595) by using bits [9:2] of the address bus as a mask.
In this manner, software drivers can modify individual GPIO pins in a single instruction without
affecting the state of the other pins. This method is more efficient than the conventional method of
performing a read-modify-write operation to set or clear an individual GPIO pin. To implement this
feature, the GPIODATA register covers 256 locations in the memory map.
During a write, if the address bit associated with that data bit is set, the value of the GPIODATA
register is altered. If the address bit is cleared, the data bit is left unchanged.
For example, writing a value of 0xEB to the address GPIODATA + 0x098 has the results shown in
Figure 9-3, where u indicates that data is unchanged by the write. This example demonstrates how
GPIODATA bits 5, 2, and 1 are written.
Figure 9-3. GPIODATA Write Example
ADDR[9:2] 9 8 7 6 5 4 3 2 1 0
0x098 0 0 1 0 0 1 1 0 0 0
0xEB 1 1 1 0 1 0 1 1
GPIODATA u u 1 u u 0 1 u
76543210
During a read, if the address bit associated with the data bit is set, the value is read. If the address
bit associated with the data bit is cleared, the data bit is read as a zero, regardless of its actual
value. For example, reading address GPIODATA + 0x0C4 yields as shown in Figure 9-4. This
example shows how to read GPIODATA bits 5, 4, and 0.
Figure 9-4. GPIODATA Read Example
ADDR[9:2] 9 8 7 6 5 4 3 2 1 0
0x0C4 0 0 1 1 0 0 0 1 0 0
GPIODATA 1 0 1 1 1 1 1 0
9.2.2
Returned Value 0 0 1 1 0 0 0 0
76543210
Interrupt Control
The interrupt capabilities of each GPIO port are controlled by a set of seven registers. These registers
are used to select the source of the interrupt, its polarity, and the edge properties. When one or
more GPIO inputs cause an interrupt, a single interrupt output is sent to the interrupt controller for
the entire GPIO port. For edge-triggered interrupts, software must clear the interrupt to enable any
June 12, 2014
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