TM4C1232H6PM Datasheet, PDF (10/1172 Pages) Texas Instruments – Tiva Microcontroller

Table of Contents
List of Figures
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Figure 11-1.
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Figure 12-3.
Tiva^™ TM4C1232H6PM Microcontroller High-Level Block Diagram ......................... 40
CPU Block Diagram ............................................................................................. 60
TPIU Block Diagram ............................................................................................ 61
Cortex-M4F Register Set ...................................................................................... 64
Bit-Band Mapping ................................................................................................ 88
Data Storage ....................................................................................................... 89
Vector Table ........................................................................................................ 96
Exception Stack Frame ........................................................................................ 99
SRD Use Example ............................................................................................. 117
FPU Register Bank ............................................................................................ 120
JTAG Module Block Diagram .............................................................................. 190
Test Access Port State Machine ......................................................................... 193
IDCODE Register Format ................................................................................... 199
BYPASS Register Format ................................................................................... 199
Boundary Scan Register Format ......................................................................... 200
Basic RST Configuration .................................................................................... 204
External Circuitry to Extend Power-On Reset ....................................................... 204
Reset Circuit Controlled by Switch ...................................................................... 205
Power Architecture ............................................................................................ 208
Main Clock Tree ................................................................................................ 210
Module Clock Selection ...................................................................................... 217
Internal Memory Block Diagram .......................................................................... 457
EEPROM Block Diagram ................................................................................... 458
μDMA Block Diagram ......................................................................................... 519
Example of Ping-Pong μDMA Transaction ........................................................... 525
Memory Scatter-Gather, Setup and Configuration ................................................ 527
Memory Scatter-Gather, μDMA Copy Sequence .................................................. 528
Peripheral Scatter-Gather, Setup and Configuration ............................................. 530
Peripheral Scatter-Gather, μDMA Copy Sequence ............................................... 531
Digital I/O Pads ................................................................................................. 585
Analog/Digital I/O Pads ...................................................................................... 586
GPIODATA Write Example ................................................................................. 587
GPIODATA Read Example ................................................................................. 587
GPTM Module Block Diagram ............................................................................ 638
Reading the RTC Value ...................................................................................... 645
Input Edge-Count Mode Example, Counting Down ............................................... 647
16-Bit Input Edge-Time Mode Example ............................................................... 648
16-Bit PWM Mode Example ................................................................................ 650
CCP Output, GPTMTnMATCHR > GPTMTnILR ................................................... 650
CCP Output, GPTMTnMATCHR = GPTMTnILR ................................................... 651
CCP Output, GPTMTnILR > GPTMTnMATCHR ................................................... 651
Timer Daisy Chain ............................................................................................. 652
WDT Module Block Diagram .............................................................................. 708
Implementation of Two ADC Blocks .................................................................... 733
ADC Module Block Diagram ............................................................................... 734
ADC Sample Phases ......................................................................................... 737
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June 12, 2014
Texas Instruments-Production Data