TMS320F28335_016 Datasheet, PDF (54/201 Pages) Texas Instruments – Digital Signal Controllers (DSCs)

TMS320F28335, TMS320F28334, TMS320F28333, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
SPRS439N – JUNE 2007 – REVISED OCTOBER 2016
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Table 5-16. STANDBY Mode Timing Requirements
t_w(WAKE-INT)
Pulse duration, external
wake-up signal
Without input qualification
With input qualification⁽¹⁾
(1) QUALSTDBY is a 6-bit field in the LPMCR0 register.
MIN
3t_c(OSCCLK)
(2 + QUALSTDBY) * t_c(OSCCLK)
MAX
UNIT
cycles
Table 5-17. STANDBY Mode Switching Characteristics
PARAMETER
TEST CONDITIONS
MIN
MAX UNIT
t_d(IDLE-XCOL)
Delay time, IDLE instruction
executed to XCLKOUT low
32t_c(SCO)
45t_c(SCO) cycles
Delay time, external wake signal to
program execution resume⁽¹⁾
t_d(WAKE-STBY)
• Wake up from flash
– Flash module in active
state
• Wake up from flash
– Flash module in sleep
state
Without input qualifier
With input qualifier
Without input qualifier
With input qualifier
100t_c(SCO)
100t_c(SCO) + t_w(WAKE-INT)
1125t_c(SCO)
1125t_c(SCO) + t_w(WAKE-INT)
cycles
cycles
• Wake up from SARAM
Without input qualifier
With input qualifier
100t_c(SCO)
100t_c(SCO) + t_w(WAKE-INT)
cycles
(1) This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered
by the wake up signal) involves additional latency.
54
Specifications
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