LM3S2730 Datasheet, PDF (523/562 Pages) Texas Instruments – Stellaris® LM3S2730 Microcontroller

Stellaris^® LM3S2730 Microcontroller
Table 17-11. JTAG Characteristics (continued)
Parameter
No.
Parameter Parameter Name
Min
Nom
Max
Unit
2-mA drive
23
35
ns
J11
TCK fall to Data
t _{TDO_ZDV} ^{Valid from High-Z}
4-mA drive
8-mA drive
15
26
ns
-
14
25
ns
8-mA drive with slew rate control
18
29
ns
2-mA drive
21
35
ns
J12
t _{TDO_DV}
TCK fall to Data
Valid from Data
Valid
4-mA drive
8-mA drive
14
25
ns
-
13
24
ns
8-mA drive with slew rate control
18
28
ns
2-mA drive
9
11
ns
J13
TCK fall to High-Z
t _{TDO_DVZ} ^{from Data Valid}
4-mA drive
8-mA drive
7
9
ns
-
6
8
ns
8-mA drive with slew rate control
7
9
ns
J14
t_TRST
TRST assertion time
J15
t_{TRST_SU}
TRST setup time to TCK rise
100
-
-
ns
10
-
-
ns
Figure 17-2. JTAG Test Clock Input Timing
J2
J3
J4
TCK
J6
J5
Figure 17-3. JTAG Test Access Port (TAP) Timing
TCK
TMS
TDI
TDO
J7
J8
J7
J8
TMS Input Valid
TMS Input Valid
J9
J10
J9
J10
TDI Input Valid
TDI Input Valid
J11
J12
J13
TDO Output Valid
TDO Output Valid
June 18, 2012
523
Texas Instruments-Production Data