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LM3S2730 Datasheet, PDF (507/562 Pages) Texas Instruments – Stellaris® LM3S2730 Microcontroller
Stellaris® LM3S2730 Microcontroller
Table 15-5. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Typea Description
F2
PD6
I/O
TTL
GPIO port D bit 6.
F3
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
F10
GND
-
Power Ground reference for logic and I/O pins.
F11
GND
-
Power Ground reference for logic and I/O pins.
F12
GND
-
Power Ground reference for logic and I/O pins.
PD0
I/O
TTL
GPIO port D bit 0.
G1
CAN0Rx
I
TTL
CAN module 0 receive.
PD1
I/O
TTL
GPIO port D bit 1.
G2
CAN0Tx
O
TTL
CAN module 0 transmit.
G3
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
G10
VDD33
-
Power Positive supply for I/O and some logic.
G11
VDD33
-
Power Positive supply for I/O and some logic.
G12
VDD33
-
Power Positive supply for I/O and some logic.
H1
PD3
I/O
TTL
GPIO port D bit 3.
H2
PD2
I/O
TTL
GPIO port D bit 2.
H3
GND
-
Power Ground reference for logic and I/O pins.
H10
VDD33
-
Power Positive supply for I/O and some logic.
H11
RST
I
TTL
System reset input.
H12
PF1
I/O
TTL
GPIO port F bit 1.
J1
PG2
I/O
TTL
GPIO port G bit 2.
J2
PG3
I/O
TTL
GPIO port G bit 3.
J3
GND
-
Power Ground reference for logic and I/O pins.
J10
GND
-
Power Ground reference for logic and I/O pins.
J11
PF2
I/O
TTL
GPIO port F bit 2.
J12
PF3
I/O
TTL
GPIO port F bit 3.
K1
PG0
I/O
TTL
GPIO port G bit 0.
K2
PG1
I/O
TTL
GPIO port G bit 1.
K3
PG4
I/O
TTL
GPIO port G bit 4.
K4
PF7
I/O
TTL
GPIO port F bit 7.
K5
GND
-
Power Ground reference for logic and I/O pins.
K6
GND
-
Power Ground reference for logic and I/O pins.
K7
VDD33
-
Power Positive supply for I/O and some logic.
K8
VDD33
-
Power Positive supply for I/O and some logic.
K9
VDD33
-
Power Positive supply for I/O and some logic.
K10
GND
-
Power Ground reference for logic and I/O pins.
K11
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
K12
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
L1
PC4
I/O
TTL
GPIO port C bit 4.
L2
PC7
I/O
TTL
GPIO port C bit 7.
June 18, 2012
507
Texas Instruments-Production Data