LP38852-ADJ_16 Datasheet, PDF (5/33 Pages) Texas Instruments – 1.5-A Fast-Response High-Accuracy Adjustable LDO Linear Regulator

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LP38852-ADJ
SNVS482F – JANUARY 2007 – REVISED DECEMBER 2015
6.4 Thermal Information
THERMAL METRIC⁽¹⁾
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
KTW (DDPAK/TO-263)
7 PINS
34.3
37.6
25.3
6.6
24.0
n/a
LP38852-ADJ
NDZ (TO-220)
7 PINS
34.0
36.4
25.0
6.3
23.6
n/a
DDA (SO PowerPAD)
8 PINS
48.4
54.6
29.1
9.6
29.0
4.3
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
Unless otherwise specified: V_OUT = 0.8 V, V_IN = V_OUT(NOM) + 1 V, V_BIAS = 3 V, V_EN = V_BIAS, I_OUT = 10 mA, C_IN = C_OUT = 10 µF,
C_BIAS = 1 µF, C_SS = open; typical (TYP) limits are for T_J = 25°C only, and minimum (MIN) and maximum (MAX) limits apply
over the junction temperature (T_J) range of –40°C to +125°C. Minimum and maximum limits are specified through test,
design, or statistical correlation. Typical values represent the most likely parametric norm at T_J = 25°C, and are provided for
reference purposes only.
PARAMETER
V_ADJ
V_ADJ accuracy
V_OUT
V_OUT range
ΔV_OUT/ΔV_IN
ΔV_OUT/ΔV_BIAS
ΔV_OUT/ΔI_OUT
Line regulation, V_IN(2)
Line regulation, V_BIAS(2)
Output voltage load
regulation ⁽³⁾
TEST CONDITIONS
V_OUT(NOM)+1 V ≤ V_IN ≤ V_BIAS ≤ 4.5 V ⁽¹⁾
3 V ≤ V_BIAS ≤ 5.5 V, 10 mA ≤ I_OUT ≤ 1.5 A
T_J = 25°C
V_OUT(NOM)+1 V ≤ V_IN ≤ V_BIAS ≤ 4.5 V⁽¹⁾
3 V ≤ V_BIAS ≤ 5.5 V, 10 mA ≤ I_OUT ≤ 1.5 A
V_OUT(NOM)+1 V ≤ V_IN ≤ V_BIAS ≤ 4.5 V⁽¹⁾
3 V ≤ V_BIAS ≤ 5.5 V,
10 mA ≤ I_OUT ≤ 1.5 A,
0°C ≤ T_J ≤ +125°C
3 V ≤ V_BIAS ≤ 5.5 V
4.5 V ≤ V_BIAS ≤ 5.5 V
V_OUT(NOM)+1 V ≤ V_IN ≤ V_BIAS
3 V ≤ V_BIAS ≤ 5.5 V
10 mA ≤ I_OUT ≤ 1.5 A
MIN
492.5
485
490
0.8
0.8
TYP
MAX UNIT
500. 507.5
515 _mV
500.
510
1.2
V
1.8
0.04
%/V
0.1
%/V
0.2
%/A
V_DO
I_GND(IN)
I_GND(BIAS)
Dropout voltage⁽⁴⁾
Quiescent current drawn from
V_IN supply
Quiescent current drawn from
V_BIAS supply
I_OUT = 1.5 A, T_J = 25°C
I_OUT = 1.5 A
V_OUT = 0.8 V, V_BIAS = 3 V
10 mA ≤ I_OUT ≤ 1.5 A
T_J = 25°C
V_OUT = 0.8 V, V_BIAS = 3 V
10 mA ≤ I_OUT ≤ 1.5 A
V_EN ≤ 0.5 V, T_J = 25°C
V_EN ≤ 0.5 V
10 mA ≤ I_OUT ≤ 1.5 A, T_J = 25°C
10 mA ≤ I_OUT ≤ 1.5 A
V_EN ≤ 0.5 V, T_J = 25°C
V_EN ≤ 0.5 V
130
165
mV
180
7
8.5
mA
9
1
100
μA
300
3
3.8
mA
4.5
100
170
μA
200
(1) V_IN cannot exceed either V_BIAS or 4.5 V, whichever value is lower.
(2) Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.
(3) Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load
to full load.
(4) Dropout voltage is defined as the input to output voltage differential (V_IN – V_OUT) where the input voltage is low enough to cause the
output voltage to drop 2% from the nominal value.
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