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LP38852-ADJ_16 Datasheet, PDF (19/33 Pages) Texas Instruments – 1.5-A Fast-Response High-Accuracy Adjustable LDO Linear Regulator
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LP38852-ADJ
SNVS482F – JANUARY 2007 – REVISED DECEMBER 2015
9 Power Supply Recommendations
The LP38852-ADJ device is designed to operate from an input voltage supply range between 3 V and 5.5 V. The
input voltage range provides adequate headroom in order for the device to have a regulated output. This input
supply must be well regulated. An input capacitor of at least 10 μF is required.
10 Layout
10.1 Layout Guidelines
For best overall performance, place all circuit components on the same side of the circuit board and as near to
the respective LDO pin connections as practical. Place ground return connections to the input and output
capacitor, and to the LDO ground pin, as close to each other as possible, connected by a wide, component-side,
copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and
negatively affects system performance. This grounding and layout scheme minimizes inductive parasitic, and
thereby reduces load current transients, minimizes noise, and increases circuit stability.
A ground reference plane is also recommended and is either embedded in the PCB itself or located on the
bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the output
voltage, shield noise, and it behaves similarly to a thermal plane to spread heat from the LDO device when
connected to the SO PowerPAD. In most application, this ground plane is necessary to meet thermal
requirements.
Copyright © 2007–2015, Texas Instruments Incorporated
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