LP38512 Datasheet, PDF (5/16 Pages) Texas Instruments – 1.5A Fast-Transient Response Low-Dropout Linear Voltage Regulator with Error Flag

Symbol
Parameter
Conditions
ERROR Flag
V_TH
Error Flag Threshold
(Note 9)
V_OUT rising threshold where
ERROR Flag goes high
V_OUT falling threshold where
ERROR Flag goes low
V_ERROR(SAT)
ERROR Flag Saturation
Voltage
I_SINK = 100 µA
I_lk
ERROR Flag Pin Leakage
Current
V_ERROR = 5.5V
t_d
ERROR Flag Delay time
AC Parameters
PSRR Ripple Rejection
V_IN = 2.5V
f = 120Hz
V_IN = 2.5V
f = 1 kHz
Output Noise Density
e_n
Output Noise Voltage
f = 120Hz
BW = 100Hz – 100kHz
Thermal Characteristics
T_SD
ΔT_SD
θ_J-A
Thermal Shutdown
T_J rising
Thermal Shutdown Hysteresis T_J falling from T_SD
Thermal Resistance
Junction to Ambient
TO-263 and TO-263 THIN
(Note 4)
Thermal Resistance
θ_J-C
Junction to Case
TO-263 and TO-263 THIN
Min
Typ
Max
Units
78
90
98
%
74
85
93
-
12.5
45
mV
-
1
-
nA
-
1
-
µs
-
73
-
dB
-
73
-
-
2
-
nV/√Hz
-
75
-
µV (RMS)
-
165
-
°C
-
10
-
-
60
-
°C/W
-
3
-
°C/W
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and conditions, see the Electrical Characteristics.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. Test method is per JESD22-A114.
Note 3: Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the temperatures and
times are for Sn-Pb (STD) only.
Note 4: Device operation must be evaluated, and derated as needed, based on ambient temperature (T_A), power dissipation (P_D), maximum allowable operating
junction temperature (T_J(MAX)), and package thermal resistance (θ_JA).
Note 5: Output voltage line regulation is defined as the change in output voltage from the nominal value (ΔV_OUT) due to a change in the voltage at the input
(ΔV_IN).
Note 6: Output voltage load regulation is defined as the change in output voltage from the nominal value (ΔV_OUT) due to a change in the load current at the output
(ΔI_OUT).
Note 7: The line and load regulation specification contains only the typical number. However, the limits for line and load regulation are included in the output
voltage tolerance specification.
Note 8: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. For the LP38512-1.8
the minimum V_IN operating voltage is the limiting factor.
Note 9: The ERROR Flag thresholds are specified as percentage of the nominal regulated output voltage. See Application Information.
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