LP38512 Datasheet, PDF (10/16 Pages) Texas Instruments – 1.5A Fast-Transient Response Low-Dropout Linear Voltage Regulator with Error Flag

Block Diagram
20183007
Application Information
EXTERNAL CAPACITORS
Like any low-dropout regulator, external capacitors are re-
quired to assure stability. These capacitors must be correctly
selected for proper performance.
Input Capacitor
A ceramic input capacitor of at least 10 µF is required. For
general usage across all load currents and operating condi-
tions, a 10 µF ceramic input capacitor will provide satisfactory
performance.
Output Capacitor
A ceramic capacitor with a minimum value of 10 µF is required
at the output pin for loop stability. It must be located less than
1 cm from the device and connected directly to the output and
ground pin using traces which have no other currents flowing
through them. As long as the minimum of 10 µF ceramic is
met, there is no limitation on any additional capacitance.
X7R and X5R dielectric ceramic capacitors are strongly rec-
ommended, as they typically maintain a capacitance range
within ±20% of nominal over full operating ratings of temper-
ature and voltage. Of course, they are typically larger and
more costly than Z5U/Y5U types for a given voltage and ca-
pacitance.
Z5U and Y5V dielectric ceramics are not recommended as
the capacitance will drops severely with applied voltage. A
typical Z5U or Y5V capacitor can lose 60% of its rated ca-
pacitance with half of the rated voltage applied to it. The Z5U
and Y5V also exhibit a severe temperature effect, losing more
than 50% of nominal capacitance at high and low limits of the
temperature range.
REVERSE VOLTAGE
A reverse voltage condition will exist when the voltage at the
output pin is higher than the voltage at the input pin. Typically
this will happen when V_IN is abruptly taken low and C_OUT con-
tinues to hold a sufficient charge such that the input to output
voltage becomes reversed. A less common condition is when
an alternate voltage source is connected to the output.
There are two possible paths for current to flow from the out-
put pin back to the input during a reverse voltage condition.
While V_IN is high enough to keep the control circuity alive, and
the Enable pin is above the V_EN(ON) threshold, the control cir-
cuitry will attempt to regulate the output voltage. Since the
input voltage is less than the output voltage the control circuit
will drive the gate of the pass element to the full on condition
when the output voltage begins to fall. In this condition, re-
verse current will flow from the output pin to the input pin,
limited only by the R_DS(ON) of the pass element and the output
to input voltage differential. Discharging an output capacitor
up to 1000 µF in this manner will not damage the device as
the current will rapidly decay. However, continuous reverse
current should be avoided.
The internal PFET pass element in the LP38512 has an in-
herent parasitic diode. During normal operation, the input
voltage is higher than the output voltage and the parasitic
diode is reverse biased. However, if the output voltage to input
voltage differential is more than 500 mV (typical) the parasitic
diode becomes forward biased and current flows from the
output pin to the input through the diode. The current in the
parasitic diode should limited to less than 1A continuous and
5A peak.
If used in a dual-supply system where the regulator output
load is returned to a negative supply, the output pin must be
diode clamped to ground. A Schottky diode is recommended
for this protective clamp.
SHORT-CIRCUIT PROTECTION
The LP38512 is short circuit protected, and in the event of a
peak over-current condition the short-circuit control loop will
rapidly drive the output PMOS pass element off. Once the
power pass element shuts down, the control loop will rapidly
cycle the output on and off until the average power dissipation
causes the thermal shutdown circuit to respond to servo the
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