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DS100KR800 Datasheet, PDF (5/33 Pages) Texas Instruments – Ultra Low Power, 8-Channel Repeater for Data-rates up to 10.3 Gbps
Pin Name
Pin Number I/O, Type Pin Description
DEMA0, DEMA1,
DEMB0, DEMB1
49, 50, 53, 54
I, 4-LEVEL,
LVCMOS
DEMA[1:0] and DEMB[1:0] control the level of de-emphasis
of the output driver when in Gen1/2 mode. The pins are only
active when ENSMB is de-asserted (low). The 8 channels are
organized into two banks. Bank A is controlled with the DEMA
[1:0] pins and bank B is controlled with the DEMB[1:0] pins.
When ENSMB is high the SMBus registers provide
independent control of each channel. The DEMA[1:0] pins are
converted to SMBUS SCL/SDA and DEMB[1:0] pins are
converted to AD0, AD1 inputs.
See Table 3: Output Voltage and De-emphasis Settings
MODE
21
I, 4-LEVEL, Tie 1kΩ to VDD = 10G-KR Mode Operation
LVCMOS
Tie 1kΩ to GND = 10G Mode Operation
SD_TH
26
I, 4-LEVEL, Controls the internal Signal Detect Threshold
LVCMOS See Table 4: Signal Detect Threshold Level
Control Pins — Both Pin and SMBus Modes (LVCMOS)
INPUT_EN
22
I, 4-LEVEL, Tie 1kΩ to VDD = Normal Operation
LVCMOS
RESERVED
23
I, FLOAT
Float = Normal Operation
VDD_SEL
25
I, FLOAT
Controls the internal regulator
Float = 2.5V mode
Tie GND = 3.3V mode
RESET
52
I, LVCMOS LOW = Device is enabled (Normal Operation)
HIGH = Low Power Mode
Outputs
ALL_DONE
27
O, LVCMOS Valid Register Load Status Output
HIGH = External EEPROM load failed
LOW = External EEPROM load passed
Power
VIN
24
Power
In 3.3V mode, feed 3.3V to VIN
In 2.5V mode, leave floating.
VDD
9, 14, 36, 41, 51 Power
Power supply pins CML/analog
2.5V mode, connect to 2.5V
3.3V mode, connect 0.1 uF cap to each VDD pin
GND
DAP
Power
Ground pad (DAP - die attach pad).
Notes:
LVCMOS inputs without the “Float” conditions must be driven to a logic low or high at all times or operation is not guar-
anteed.
Input edge rate for LVCMOS/FLOAT inputs must be faster than 50 ns from 10–90%.
For 3.3V mode operation, VIN pin = 3.3V and the "VDD" for the 4-level input is 3.3V.
For 2.5V mode operation, VDD pin = 2.5V and the "VDD" for the 4-level input is 2.5V.
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