BQ50002 Datasheet, PDF (5/35 Pages) Texas Instruments – Low-Cost 5-V Wireless Power Transmitter Analog Front

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bq50002
SLUSBW1A – OCTOBER 2015 – REVISED OCTOBER 2015
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) ⁽¹⁾
PVIN1, PVIN2
BOOT1 ⁽²⁾
VBOOT1 – VSW1
BOOT2 ⁽²⁾
VBOOT2 – VSW2
PWM1, PWM2, EN, CLK_OUT, MODE,
PWM_CTRL
DMIN1
DMIN2
CSN, CSP
CSN to CSP
Operating junction temperature, T_J
Storage temperature, T_stg
MIN
MAX
UNIT
–0.3
7
V
–0.3
14
V
–0.3
7
V
–0.3
14
V
–0.3
7
V
–0.3
3.6
V
–5
7
V
–0.3
7
V
–0.3
7
V
-0.5
0.5
V
–40
125
°C
–55
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) In normal use, BOOT1, BOOT2 voltage internally regulated.
6.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 ⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-C101
(2)
VALUE
±1000
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
V
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
C_BP3
C_PVIN1,
C_PVIN2
C_PVIN1,
C_PVIN2
C_BOOT1,
C_BOOT2
PVIN1, PVIN2
PWM1, PWM2, EN, CLK_OUT, MODE, PWM_CTRL
DMIN1
DMIN2
BP3 ceramic capacitor
PVIN1, PVIN2 ceramic capacitor
PVIN1, PVIN2 electrolytic capacitor
SW1-BOOT1, SW2-BOOT2 capacitor
MIN
NOM
MAX UNIT
4.5
5
5.5
V
0
3
3.3
V
–0.3
5
V
–0.3
5
V
2.2
µF
0.1
µF
22
µF
0.1
µF
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