BQ50002 Datasheet, PDF (4/35 Pages) Texas Instruments – Low-Cost 5-V Wireless Power Transmitter Analog Front

bq50002
SLUSBW1A – OCTOBER 2015 – REVISED OCTOBER 2015
www.ti.com
NAME
BOOT1
PIN
NO.
25
BOOT2
16
BP3
4
CLK_OUT
9
CSN
29
CSO
31
CSP
30
DMIN1
11
DMIN2
12
DMOUT1
8
DMOUT2
7
EN
3
GND
5
GND
6
GND
13
MODE
10
PGND
20
PGND
21
PGND
22
PVIN1
27
PVIN1
28
PVIN2
14
PVIN2
15
PWM_CTRL
2
PWM1/CLK_IN
1
PWM2/UP_DN
32
SW1
23
SW1
24
SW1
26
SW2
17
SW2
18
SW2
19
Pin Functions
I/O
DESCRIPTION
I/O
Positive supply rail for the high-side gate driver. Connect a 0.1-µF ceramic capacitor
between the BOOT1 and SW1 pins.
I/O
Positive supply rail for the high-side gate driver. Connect a 0.1-µF ceramic capacitor
between the BOOT2 and SW2 pins.
O
LDO output. Tie with 2.2-µF capacitor to GND. For use by bq500511 only.
O
Internal oscillator clock out signal.
I
Current sense amplifier negative input.
O
Current sense amplifier output. For use by bq500511 only.
I
Current sense amplifier positive input. Connect current sense resistor as close as
possible to this pin. This also serves as the quiet node for power supply input.
I
Modulated signal from coil for DEMOD CHAN1.
I
Modulated signal from coil for DEMOD CHAN2.
O
Demodulated 2-kHz signal from CHAN1. For use by bq500511 only.
O
Demodulated 2-kHz signal from CHAN2. For use by bq500511 only.
Enable pin with a weak internal pull-down. Float or pull below 1.5 V to disable gate
I
driver, demodulation and current sense. Pull above 2.2 V to enable gate driver. Used
by bq500511 to enter and leave standby mode for the transmitter.
–
Signal ground for the ground-referenced logic. All signal level circuits should be
referenced to this pin unless otherwise noted.
–
Signal ground for the ground-referenced logic. All signal level circuits should be
referenced to this pin unless otherwise noted.
–
Signal ground for the ground-referenced logic. All signal level circuits should be
referenced to this pin unless otherwise noted.
MODE pin with a weak internal pull-down. Float, or pull below 1.5 V to enable
I
frequency control of the internally generated PWM signal. Pull above 2.2 V to enable
pulse width control of the internally generated PWM signal. Used by bq500511 to
select the control method for power control
–
Power ground for the ground-referenced power stage. Connect to GND.
–
Power ground for the ground-referenced power stage. Connect to GND.
–
Power ground for the ground-referenced power stage. Connect to GND.
I
DC input voltage for half-bridge MOSFET. Bypass with 22-µF ceramic capacitor to
GND.
I
DC input voltage for half-bridge MOSFET. Bypass with 22-µF ceramic capacitor to
GND.
I
DC input voltage for half-bridge MOSFET. Bypass with 22-µF ceramic capacitor to
GND.
I
DC input voltage for half-bridge MOSFET. Bypass with 22-µF ceramic capacitor to
GND.
I
PWM_CTRL pin with a weak internal pull-down. Controlled by bq500511 (SLUSCD3)
for system power delivery control.
I
PWM1/CLK_IN pin with a weak internal pull-down. Controlled by bq500511
(SLUSCD3) for system power delivery control.
I
PWM2/UP_DN pin with a weak internal pull-down. Controlled by bq500511
(SLUSCD3) for system power delivery control.
O
Switch node of the half-bridge MOSFETs. Connect to TX coil.
O
Switch node of the half-bridge MOSFETs. Connect to TX coil.
O
Switch node of the half-bridge MOSFETs . Connect to TX coil.
O
Switch node of the half-bridge MOSFETs. Connect to resonant capacitor.
O
Switch node of the half-bridge MOSFETs. Connect to resonant capacitor.
O
Switch node of the half-bridge MOSFETs. Connect to resonant capacitor.
4
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