BQ24740_14 Datasheet, PDF(5/33 Page) Texas Instruments – Host-Controlled Multi-Chemistry Battery Charger

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bq24740

www.ti.com............................................................................................................................................... SLUS736C â DECEMBER 2006 â REVISED MARCH 2009

Table 1. TERMINAL FUNCTIONS â 28-PIN QFN

TERMINAL

DESCRIPTION

NAME

NO.

CHGEN

1 Charge enable active-low logic input. LO enables charge. HI disables charge.

ACN

Adapter current sense resistor, negative input. A 0.1-ÂµF ceramic capacitor is placed from ACN pin to AGND for

common-mode filtering. A 0.1-ÂµF ceramic capacitor is placed from ACN to ACP to provide differential-mode filtering.

ACP

Adapter current sense resistor, positive input. A 0.1-ÂµF ceramic capacitor is placed from ACN to ACP to provide

differential-mode filtering. A 0.1-ÂµF ceramic capacitor is placed from ACP pin to AGND for common-mode filtering.

LPMD

Low power mode detect active-high open-drain logic output. Place a 10-kâ¦ pullup resistor from LPMD pin to the

pullup-voltage rail. Place a positive-feedback resistor from LPMD pin to LPREF pin for programming hysteresis (see

the design example for calculation). The output is HI when IADAPT pin voltage is lower than LPREF pin voltage. The

output is LO when IADAPT pin voltage is higher than LPREF pin voltage.

ACDET

Adapter detected voltage set input. Program the adapter detect threshold by connecting a resistor divider from

adapter input to ACDET pin to AGND pin. Adapter voltage is detected if ACDET-pin voltage is greater than 2.4 V.

5 The IADAPT current sense amplifier is active when the ACDET pin voltage is greater than 0.6 V. ACOV is input

overvoltage protection; it disables charge when ACDET > 3.1 V. ACOV does not latch, and normal operation

resumes when ACDET < 3.1 V.

ACSET

Adapter current set input. The voltage ratio of ACSET voltage versus VDAC voltage programs the input current

regulation set-point during Dynamic Power Management (DPM). Program by connecting a resistor divider from VDAC

to ACSET to AGND; or by connecting the output of an external DAC to the ACSET pin and connect the DAC supply

to the VDAC pin.

LPREF

Low power voltage set input. Connect a resistor divider from VREF to LPREF and AGND to program the reference

for the LOPWR comparator. The LPREF-pin voltage is compared to the IADAPT-pin voltage and the logic output is

given on the LPMD open-drain pin. Connecting a positive-feedback resistor from LPREF pin to LPMD pin programs

the hysteresis.

IADSLP

Enable IADAPT to enter sleep mode; active-low logic input. Allows low Iq sleep mode when adapter not detected.

Logic low turns off the Input Current Sense Amplifier (IADAPT) when adapter is not detected and ACDET pin is < 0.6

V - allows lower battery discharge current. Logic high keeps IADAPT current-sense amplifier on when adapter is not

detected and ACDET pin is <0.6 V - this allows measuring battery discharge current.

AGND

Analog ground. Ground connection for low-current sensitive analog and digital signals. On PCB layout, connect to the

analog ground plane, and only connect to PGND through the PowerPad underneath the IC.

VREF

3.3-V regulated voltage output. Place a 1-ÂµF ceramic capacitor from VREF to AGND pin close to the IC. This voltage

10 could be used for ratiometric programming of voltage and current regulation. VREF is the source for the internal

circuit.

VDAC

Charge voltage set reference input. Connect the VREF or external DAC voltage source to the VDAC pin. Battery

voltage, charge current, and input current are programmed as a ratio of the VDAC pin voltage versus the VADJ,

11 SRSET, and ACSET pin voltages, respectively. Place resistor dividers from VDAC to VADJ, SRSET, and ACSET

pins to AGND for programming. A DAC could be used by connecting the DAC supply to VDAC and connecting the

output to VADJ, SRSET, or ACSET.

VADJ

Charge voltage set input. The voltage ratio of VADJ voltage versus VDAC voltage programs the battery voltage

regulation set-point. Program by connecting a resistor divider from VDAC to VADJ, to AGND; or, by connecting the

output of an external DAC to VADJ, and connect the DAC supply to VDAC. VADJ connected to REGN programs the

default of 4.2 V per cell.

EXTPWR

Valid adapter active-low detect logic open-drain output. Pulled low when input voltage is above ACDET programmed

13 threshold, OR input current is greater than 1.25 A with 10-mâ¦ sense resistor. Connect a 10-kâ¦ pullup resistor from

EXTPWR pin to pullup supply rail.

ISYNSET

Synchronous mode current set input. Place a resistor from ISYNSET to AGND to program the charge undercurrent

14 threshold to force non-synchronous converter operation at low output current, and to prevent negative inductor

current. Threshold should be set at greater than half of the maximum inductor ripple current (50% duty cycle).

IADAPT

Adapter current sense amplifier output. IADAPT voltage is 20 times the differential voltage across ACP-ACN. Place a

100-pF or less ceramic decoupling capacitor from IADAPT to AGND.

SRSET

Charge current set input. The voltage ratio of SRSET voltage versus VDAC voltage programs the charge current

16 regulation set-point. Program by connecting a resistor divider from VDAC to SRSET to AGND; or by connecting the

output of an external DAC to SRSET pin and connect the DAC supply to VDAC pin.

Battery voltage remote sense. Directly connect a kelvin sense trace from the battery pack positive terminal to the

BAT

17 BAT pin to accurately sense the battery pack voltage. Place a 0.1-ÂµF capacitor from BAT to AGND close to the IC to

filter high-frequency noise.

SRN

Charge current sense resistor, negative input. A 0.1-ÂµF ceramic capacitor is placed from SRN to SRP to provide

18 differential-mode filtering. An optional 0.1-ÂµF ceramic capacitor is placed from SRN pin to AGND for common-mode

filtering.

SRP

Charge current sense resistor, positive input. A 0.1-ÂµF ceramic capacitor is placed from SRN to SRP to provide

differential-mode filtering. A 0.1-ÂµF ceramic capacitor is placed from SRP pin to AGND for common-mode filtering.

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