TNETX3150 Datasheet, PDF (49/113 Pages) Texas Instruments – ThunderSWITCHE 15-PORT 10-/100-MBIT/S ETHERNETE SWITCH

TNETX3150/TNETX3150A
ThunderSWITCH^™ 15-PORT 10-/100-MBIT/S ETHERNET^™ SWITCH
RAM size register at 0x00C2
7
6
5
MTEST
Reserved
Initial Values After Reset
0
X
X
SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997
BIT
4
3
2
1
0
TAGOFF
RSIZE
Initial Values After Reset
0
0
1
0
0
BIT
NAME
FUNCTION
Test access bit. MTEST = 1 before DIO accesses are made to the DIO test registers (address range 0xDC–0xFF).
7
MTEST
MTEST = 0 when the EEPROM is used to initialize registers 0x00–0xC3. The default value after reset is 0. MTEST
allows access to the DIO registers to enable frame-wrap test modes.
6–5
Reserved Reserved
Post-frame tag disable bit. TAGOFF disables the requirement for post-frame tagging when operating in 200-Mbit/s
4
TAGOFF
wide uplink mode. In this mode (TAGOFF = 1), the TNETX3150/TNETX3150A uses either the EAM interface or
the internal single-address lookup registers to route frames received on the uplink. This permits two
TNETX3150/TNETX3150A devices to be cascaded.
RAM size select. This field indicates the size of the external DRAM and, therefore, the number of 64-byte data
buffers available.† This field is used by the TNETX3150/TNETX3150A to determine how many buffers to initialize.
The code values are:
3–0
RSIZE
3–0
RSIZE
3–0
RSIZE
BIT
3
0000–0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
CODE
NUMBER OF
0 ^VALUES
BUFFERS
Reserved
—
4K × 36
240
8K × 36
480
16K × 36
961
32K × 36
1922
64K × 36
3845
128K × 36
7690
256K × 36
15,380
512K × 36
30,720
1M × 36
61,440
2M × 36
122,880
4M × 36
245,760
Reserved
—
† _{Buffers are 76.5 bytes long (four bytes of forward pointer). Fifteen 76.5-byte buffers are allocated per 1K-byte page. The first word of every 1K-byte}
page is not used. Buffers never straddle page boundaries.
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