DM3730_14 Datasheet, PDF (49/281 Pages) Texas Instruments – Digital Media Processors

DM3730, DM3725
www.ti.com
SPRS685D – AUGUST 2010 – REVISED JULY 2011
BALL
BOTTOM
[1]
K2
J1
AD8
AD1
A3
B6
B4
C4
B5
C5
N2
M1
AC6
AC11
AC8
B3
C6
Table 2-2. Ball Characteristics (CBC Pkg.)⁽⁵⁾ (continued)
BALL TOP PIN NAME [2]
[1]
NA
gpmc_nbe0_cle
gpio_60
safe_mode
NA
gpmc_nbe1
gpio_61
safe_mode
AA8
gpmc_ncs0
W1
gpmc_ncs1
gpio_52
safe_mode
NA
gpmc_ncs2
gpio_53
safe_mode
NA
gpmc_ncs3
sys_ndmareq0
gpio_54
safe_mode
NA
gpmc_ncs4
sys_ndmareq1
mcbsp4_clkx
gpt_9_pwm_evt
gpio_55
safe_mode
NA
gpmc_ncs5
sys_ndmareq2
mcbsp4_dr
gpt_10_pwm_evt
gpio_56
safe_mode
NA
gpmc_ncs6
sys_ndmareq3
mcbsp4_dx
gpt_11_pwm_evt
gpio_57
safe_mode
NA
gpmc_ncs7
gpmc_io_dir
mcbsp4_fsx
gpt_8_pwm_evt
gpio_58
safe_mode
L2
gpmc_noe
K1
gpmc_nwe
Y5
gpmc_nwp
gpio_62
safe_mode
Y10
gpmc_wait0
Y8
gpmc_wait1
gpio_63
safe_mode
NA
gpmc_wait2
uart4_tx
gpio_64
safe_mode
NA
gpmc_wait3
MODE [3] TYPE [4]
0
O
4
IO
7
-
0
O
4
IO
7
-
0
O
0
O
4
IO
7
-
0
O
4
IO
7
-
0
O
1
I
4
IO
7
-
0
O
1
I
2
IO
3
IO
4
IO
7
-
0
O
1
I
2
I
3
IO
4
IO
7
-
0
O
1
I
2
IO
3
IO
4
IO
7
-
0
O
1
O
2
IO
3
IO
4
IO
7
-
0
O
0
O
0
O
4
IO
7
-
0
I
0
I
4
IO
7
-
0
I
2
O
4
IO
7
-
0
I
BALL
RESET
STATE [5]
L
BALL RESET RESET
POWER [8] HYS [9]
REL. STATE REL. MODE
[6]
[7]
0
0
vdds
Yes
L
L
7
vdds
Yes
1
1
H
1
0
vdds
NA
0
vdds
Yes
H
H
7
vdds
Yes
H
H
7
vdds
Yes
H
H
7
vdds
Yes
H
H
7
vdds
Yes
H
H
7
vdds
Yes
H
H
7
vdds
Yes
1
1
1
1
L
0
H
H
H
H
H
H
0
vdds
NA
0
vdds
NA
0
vdds
Yes
0
vdds
Yes
7
vdds
Yes
7
vdds
Yes
H
H
7
vdds
Yes
BUFFER PULLUP
STRENGTH /DOWN
(mA) [10] TYPE [11]
8
PU/ PD
IO CELL
[12]
LVCMOS
8
PU/ PD
LVCMOS
8
NA
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
NA
LVCMOS
8
NA
LVCMOS
8
PU/ PD
LVCMOS
NA
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
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