ADS6149_14 Datasheet, PDF (47/71 Pages) Texas Instruments – 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs

ADS6149/ADS6129
ADS6148/ADS6128
www.ti.com ..................................................................................................................................................... SLWS211B – JULY 2008 – REVISED OCTOBER 2008
CONTOUR PLOTS - ADS6149/ADS6148
Plots are at 25°C, AVDD = 3.3V, DRVDD = 1.8 V, sine wave input clock, 1.5 V_PP differential clock amplitude, 50% clock duty
cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, LVDS output interface (unless otherwise noted)
250
240
73
220
200
67
66
72
71
70
69
68
180
73
69
66
67
160
72
70
68
71
140
120
100
73
72
74
80
20 50
100
150
64
65
66
67
71
69
70
68
67
66
65
200
250
300
350
400
450
500
f_IN - Input Frequency - MHz
68
69
70
71
72
73
74
75
250
240
220
200
180
68
160
140
120
68
100
80
20
100
60
61
SNR - dBFS
Figure 94. SNR Contour Plot (0 dB gain)
67
66
65
64
63
67
63
66
64
65
67
66
65
64
63
200
300
400
500
600
f_IN - Input Frequency - MHz
62
63
64
65
66
67
M0048-19
62
62
62
700
68
61
800
69
SNR - dBFS
Figure 95. SNR Contour Plot (6 dB gain)
M0048-20
Copyright © 2008, Texas Instruments Incorporated
Submit Documentation Feedback
47
Product Folder Link(s): ADS6149/ADS6129 ADS6148/ADS6128