ADS6149_14 Datasheet, PDF (17/71 Pages) Texas Instruments – 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs

ADS6149/ADS6129
ADS6148/ADS6128
www.ti.com ..................................................................................................................................................... SLWS211B – JULY 2008 – REVISED OCTOBER 2008
Register Address
Register Data
SDATA
SCLK
SEN
A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
t_(SCLK)
t_(DSU)
t_(DH)
t_(SLOADS)
t_(SLOADH)
RESET
Figure 6. Serial Interface Timing
T0109-01
SERIAL INTERFACE TIMING CHARACTERISTICS
Typical values at 25°C, min and max values across the full temperature range
T_MIN = –40°C to T_MAX = 85°C, AVDD = 3.3V, DRVDD = 1.8V, unless otherwise noted.
PARAMETER
MIN
f_SCLK
t_SLOADS
t_SLOADH
t_DS
t_DH
SCLK frequency (= 1/ tSCLK)
SEN to SCLK setup time
SCLK to SEN hold time
SDATA setup time
SDATA hold time
> DC
25
25
25
25
TYP MAX
20
UNIT
MHz
ns
ns
ns
ns
SERIAL REGISTER READOUT
The device includes an option where the contents of the internal registers can be read back. This may be useful
as a diagnostic check to verify the serial interface communication between the external controller and the ADC.
a. First, set register bit <SERIAL READOUT> = 1. This also disables any further writes into the registers
(EXCEPT register bit <SERIAL READOUT> itself).
b. Initiate a serial interface cycle specifying the address of the register (A7-A0) whose content has to be read.
c. The device outputs the contents (D7-D0) of the selected register on OVR_SDOUT pin.
d. The external controller can latch the contents at the falling edge of SCLK.
e. To enable register writes, reset register bit <SERIAL READOUT> = 0.
Copyright © 2008, Texas Instruments Incorporated
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