TM4C123GH6PGET Datasheet, PDF (460/1456 Pages) Texas Instruments – Tiva TM4C123GH6PGE Microcontroller

System Control
Register 133: Software Reset Control 2 (SRCR2), offset 0x048
This register allows individual modules to be reset. Writes to this register are masked by the bits in
the Device Capabilities 4 (DC4) register.
Important: This register is provided for legacy software support only.
The peripheral-specific Software Reset registers (such as SRDMA) should be used to
reset specific peripherals. A write to this legacy register also writes the corresponding
bit in the peripheral-specific register. Any bits that are changed by writing to this register
can be read back correctly with a read of this register. Software must use the
peripheral-specific registers to support modules that are not present in the legacy
registers. If software uses a peripheral-specific register to write a legacy peripheral
(such as the μDMA), the write causes proper operation, but the value of that bit is not
reflected in this register. If software uses both legacy and peripheral-specific register
accesses, the peripheral-specific registers must be accessed by read-modify-write
operations that affect only peripherals that are not present in the legacy registers. In
this manner, both the peripheral-specific and legacy registers have coherent information.
Software Reset Control 2 (SRCR2)
Base 0x400F.E000
Offset 0x048
Type RO, reset 0x0000.0000
31
30
29
28
27
26
Type RO
RO
RO
RO
Reset
0
0
0
0
15
14
13
12
reserved
UDMA
Type RO
RO
RO
RO
Reset
0
0
0
0
RO
RO
0
0
11
10
reserved
RO
RO
0
0
25
24
23
22
21
20
19
18
17
16
reserved
USB0
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0
0
0
9
8
7
6
5
4
3
2
1
0
GPIOJ GPIOH GPIOG GPIOF GPIOE GPIOD GPIOC GPIOB GPIOA
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:17
16
15:14
13
12:9
Name
reserved
USB0
reserved
UDMA
reserved
Type
RO
RO
RO
RO
RO
Reset
0
0x0
0
0x0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
USB0 Reset Control
When this bit is set, USB module 0 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Micro-DMA Reset Control
When this bit is set, uDMA module is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
460
July 17, 2013
Texas Instruments-Production Data