LM3S1F11 Datasheet, PDF (457/955 Pages) Texas Instruments – Stellaris® LM3S1F11 Microcontroller

Stellaris^® LM3S1F11 Microcontroller
Figure 10-1. EPI Block Diagram
NBRFIFO
8 x 32 bits
General
Parallel
GPIO
AHB
AHB
Bus
Interface
With
DMA
WFIFO
4 x 32 bits
Baud
Rate
Control
(Clock)
SDRAM
Host Bus
Wide
Parallel
Interface
EPI 31:0
10.2
Signal Description
The following table lists the external signals of the EPI controller and describes the function of each.
The EPI controller signals are alternate functions for GPIO signals and default to be GPIO signals
at reset. The column in the table below titled "Pin Mux/Pin Assignment" lists the GPIO pin placement
for the EPI signals. The AFSEL bit in the GPIO Alternate Function Select (GPIOAFSEL) register
(page 423) should be set to choose the EPI controller function. The number in parentheses is the
encoding that must be programmed into the PMCn field in the GPIO Port Control (GPIOPCTL)
register (page 441) to assign the EPI signals to the specified GPIO port pins. For more information
on configuring GPIOs, see “General-Purpose Input/Outputs (GPIOs)” on page 399.
Table 10-1. External Peripheral Interface Signals (100LQFP)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Type^a Description
Assignment
EPI0S0
83
PH3 (8)
I/O
TTL
EPI module 0 signal 0.
EPI0S1
84
PH2 (8)
I/O
TTL
EPI module 0 signal 1.
EPI0S2
25
PC4 (8)
I/O
TTL
EPI module 0 signal 2.
EPI0S3
24
PC5 (8)
I/O
TTL
EPI module 0 signal 3.
EPI0S4
23
PC6 (8)
I/O
TTL
EPI module 0 signal 4.
EPI0S5
22
PC7 (8)
I/O
TTL
EPI module 0 signal 5.
EPI0S6
86
PH0 (8)
I/O
TTL
EPI module 0 signal 6.
EPI0S7
85
PH1 (8)
I/O
TTL
EPI module 0 signal 7.
EPI0S8
74
PE0 (8)
I/O
TTL
EPI module 0 signal 8.
EPI0S9
75
PE1 (8)
I/O
TTL
EPI module 0 signal 9.
EPI0S10
76
PH4 (8)
I/O
TTL
EPI module 0 signal 10.
January 23, 2012
457
Texas Instruments-Production Data