BQ40Z50-R1 Datasheet, PDF (44/55 Pages) Texas Instruments – Li-Ion Battery Pack Manager

bq40z50-R1
SLUSCB3 – JULY 2015
Layout Guidelines (continued)
Current Direction
RSNS
Current Sensing Direction
To SRP – SRN pin or HSRP – HSRN pin
Figure 45. Sensing Resistor PCB Layout
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Figure 46. Sense Resistor, Ground Shield, and Filter Circuit Layout
11.1.1 Protector FET Bypass and Pack Terminal Bypass Capacitors
The general principle is to use wide copper traces to lower the inductance of the bypass capacitor circuit. In
Figure 47, an example layout demonstrates this technique.
Figure 47. Use Wide Copper Traces to Lower the Inductance of Bypass Capacitors C1, C2, and C3
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