TM4C123BE6PZ_15 Datasheet, PDF (415/1310 Pages) Texas Instruments – Tiva TM4C123BE6PZ Microcontroller

Tiva^™ TM4C123BE6PZ Microcontroller
Register 115: EEPROM Peripheral Ready (PREEPROM), offset 0xA58
The PREEPROM register indicates whether the EEPROM module is ready to be accessed by
software following a change in status of power, Run mode clocking, or reset. A Run mode clocking
change is initiated if the corresponding RCGCEEPROM bit is changed. A reset change is initiated
if the corresponding SREEPROM bit is changed from 0 to 1.
The PREEPROM bit is cleared on any of the above events and is not set again until the module is
completely powered, enabled, and internally reset.
EEPROM Peripheral Ready (PREEPROM)
Base 0x400F.E000
Offset 0xA58
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
R0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
R0
Type
RO
RO
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
EEPROM Module Peripheral Ready
Value Description
0 The EEPROM module is not ready for access. It is unclocked,
unpowered, or in the process of completing a reset sequence.
1 The EEPROM module is ready for access.
June 12, 2014
415
Texas Instruments-Production Data