TMS320DM6433 Datasheet, PDF (4/271 Pages) Texas Instruments – Digital Media Processor

TMS320DM6433
Digital Media Processor
SPRS343C – NOVEMBER 2006 – REVISED JUNE 2008
1.3 Functional Block Diagram
Figure 1-1 shows the functional block diagram of the DM6433 device.
Input
Clock(s)
JTAG Interface
System Control
OSC
PLLs/Clock Generator
Power/Sleep Controller
Pin Multiplexing
DSP Subsystem
C64x+t DSP CPU
128 KB L2 RAM
32 KB
L1 Pgm
80 KB
L1 Data
Boot ROM
Video Processing Subsystem (VPSS)
Front End
Back End
Resizer
On-Screen Video ^{10b DAC}
Display Encoder 10b DAC
(OSD) (VENC) _{10b DAC}
10b DAC
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8b BT.656,
Y/C,
24b RGB
NTSC/
PAL,
S-Video,
RGB,
YPbPr
Switched Central Resource (SCR)
Peripherals
Serial Interfaces
McASP McBSP
I²C
UART
System
General-
Purpose
Timer
Watchdog
Timer
PWM
GPIO
EDMA
Connectivity
PCI
(33 MHz)
VLYNQ
EMAC
With
MDIO
HPI
Program/Data Storage
DDR2 Async EMIF/
Mem Ctlr
NAND/
(32b)
(8b)
Figure 1-1. TMS320DM6433 Functional Block Diagram
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TMS320DM6433 Digital Media Processor
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