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TLC6C5912 Datasheet, PDF (4/23 Pages) Texas Instruments – TLC6C5912 12-Channel Shift-Register LED Driver
TLC6C5912
SLIS180 – MAY 2016
NAME
PIN
NO.
SER OUT
11
SRCK
19
VCC
1
Pin Functions (continued)
www.ti.com
I/O
DESCRIPTION
Serial-data output: SER OUT is the serial data output of the 12−bit serial shift register. The
purpose of this pin is to cascade several devices on the serial bus. By connecting the SER
O
OUT pin to the SER IN input of the next device on the serial bus to cascade, the data
transfers to the next device on the falling edge of SRCK. This can improve the cascade
application reliability, as it can avoid the issue that the second device receives SRCK and
data input at the same rising edge of SRCK.
I
Shift-register clock: SRCK is the serial clock input. On each rising SRCK edge, data
transfers from SER IN to the internal serial shift registers.
I
Power supply: VCC is the power supply pin voltage for the device. TI recommends adding a
0.1 μF ceramic capacitor close to the pin.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
VCC Logic supply voltage
VI Logic input-voltage
VDS Power DMOS drain-to-source voltage
Continuous total dissipation
8
V
–0.3
8
V
42
V
See Thermal Information
Operating ambient temperature (Top)
105
°C
TJ Operating junction temperature
Tstg Storage temperature
–40
125
°C
–55
165
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
V(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-
C101 (2)
VALUE
±2000
±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
VCC Supply voltage
VIH High-level input voltage
VIL
Low-level input voltage
tsu
Setup time, SER IN high before SRCK↑
th
Hold time, SER IN high after SRCK↑
tw
Pulse duration
TA
Operating ambient temperature
MIN MAX UNIT
3 5.5 V
2.4
V
0.7 V
15
ns
15
ns
40
ns
–40 105 °C
4
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