THS1230_15 Datasheet, PDF (4/23 Pages) Texas Instruments – 3.3-V, 12-BIT, 30 MSPS, LOW-POWER ANALOG-TO-DIGITAL

THS1230
SLAS291B – OCTOBER 2000 – REVISED MARCH 2004
www.ti.com
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range, T_A (unless otherwise noted)
POWER SUPPLY
Supply voltage
AV_DD
DV_DD
ANALOG AND REFERENCE INPUTS
Reference input voltage
V_REFT
V_REFB
Reference voltage differential, V_REFT – V_REFB
Analog input voltage differential, (AIN+) – (AIN–)⁽¹⁾
Analog input capacitance, C_i
Clock input ⁽²⁾
DIGITAL OUTPUTS
Minimum digital output load resistance, R_L
Maximum digital output load capacitance, C_i
DIGITAL INPUTS
High-level input voltage, V_IH
Low-level input voltage, V_IL
Clock frequency, f_CLK(3)
Clock pulse duration, t_w(CLKL), t_w(CLKH)
Operating free-air temperature, T_A
f_CLK = 5 MHz to 30 MHz
f_CLK = 5 MHz to 30 MHz
f_CLK = 5 MHz to 30 MHz
CON1 = 0, CON0 = 1
CON1 = 1, CON0 = 0
f_CLK = 30 MHz
TH1230
TJ1230
MIN NOM MAX UNIT
3.0 3.3 3.6 V
2.0 2.15 2.5 V
1.05 1.15 1.3
0.95 1.0 1.05 V
–1.0
1.0 V
–2.0
2.0
10 pF
0
AV_DD
V
100
kΩ
0
10
15 pF
2.4
DGND
5
15
0
–40
16.7
DV_DD
0.8
30
18.3
70
85
V
V
MHz
ns
°C
(1) Based on V_REFT – V_REFB = 1.0 V, varies proportional to the V_REFT – V_REFB value. AIN+ and AIN– inputs must always be greater than 0 V
and less than AV_DD.
(2) Clock pin is referenced to AGND and powered by AV_DD.
(3) Clock frequency can be extended to this range without degradation of performance.
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