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HD3SS3212_16 Datasheet, PDF (4/26 Pages) Texas Instruments – Two-Channel Differential 2:1/1:2 USB3.1 Mux/Demux
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HD3SS3212, HD3SS3212I
SLASE74C – MAY 2015 – REVISED JANUARY 2016
PIN
NAME
NO.
RSVD1
1
RSVD2
10
Pin Functions (continued)
TYPE (1)
DESCRIPTION
O
O
Can be left not connected or can be fed to VCC
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7 Specifications
7.1 Absolute Maximum Ratings
see (1)
MIN
MAX
UNIT
VCC Supply voltage
Voltage
Tstg Storage temperature
Differential I/O
Control pins
–0.5
4
V
–0.5
2.5
V
–0.5
VCC+ 0.5
–65
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
V(ESD)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
VALUE
±2000
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage
Vih
Input high voltage (SEL, OEn pins)
Vil
Input low voltage (SEL, OEn pins)
Vdiff
High-speed signal pins differential voltage
Vcm
High speed signal pins common mode voltage
TA
Operating free-air/ambient temperature
HD3SS3212RKS
HD3SS3212IRKS
MIN
MAX UNIT
3
3.6
V
1.7
–0.1
VCC
V
0.8
V
0
1.8
Vpp
0
2
V
0
70
°C
–40
85
7.4 Thermal Information
THERMAL METRIC(1)
HD3SS3212
RKS (VQFN)
UNIT
20 PINS
RθJA
RθJC(top)
RθJB
ψJT
ψJB
RθJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
46.6
°C/W
41.8
°C/W
4.4
°C/W
17.6
°C/W
1.6
°C/W
17.6
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
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