DRV593_15 Datasheet, PDF (4/27 Pages) Texas Instruments – 3−A HIGH−EFFICIENCY PWM POWER DRIVER

DRV593
DRV594
SLOS401C – OCTOBER 2002 – REVISED JULY 2010
PIN ASSIGNMENTS
VFP PACKAGE
(TOP VIEW)
AVDD
AGND
ROSC
COSC
AREF
IN+
IN−
SHUTDOWN
32 31 30 29 28 27 26 25
1
24
2
23
3
22
4
PowerPAD™
21
5
20
6
19
7
18
8
17
9 10 11 12 13 14 15 16
PWM
PGND
PGND
PGND
PGND
PGND
PGND
H/C
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TERMINAL
NAME
NO.
AGND
2
AREF
5
AVDD
1
COSC
4
FAULT0
10
FAULT1
9
FREQ
32
IN–
7
IN+
6
INT/EXT
31
H/C
PWM
PGND
PVDD
ROSC
14, 15,
16, 17
24, 25,
26, 27
18, 19,
20, 21,
22, 23
11, 12,
13, 28,
29, 30
3
SHUTDOWN
8
TERMINAL FUNCTIONS
I/O
DESCRIPTION
Analog ground
O Connect 1 mF capacitor to ground for AREF voltage filtering
I Analog power supply
I Connect capacitor to ground to set oscillation frequency (220 pF for 500 kHz, 1 nF for 100 kHz) when
the internal oscillator is selected; connect clock signal when an external oscillator is used
O Fault flag 0, low when active open drain output (see application information)
O Fault flag 1, high when active open drain output (see application information)
I Selects 500 kHz switching frequency when a TTL logic low is applied to this terminal; selects 100 kHz
switching frequency when a TTL logic high is applied
I Negative differential input
I Positive differential input
I Selects the internal oscillator when a TTL logic high is applied to this terminal; selects the use of an
external oscillator when a TTL logic low is applied to this terminal
O Direction control output for heat and cool modes (4 pins)
O PWM output for voltage magnitude (4 pins)
High-current ground (6 pins)
I High-current power supply (6 pins)
I Connect 120-kΩ resistor to AGND to set oscillation frequency (either 500 kHz or 100 kHz). Not needed
if an external clock is used.
I Places the amplifier in shutdown mode when a TTL logic low is applied to this terminal; places the
amplifier in normal operation when a TTL logic high is applied
4
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