CD74HC4016_15 Datasheet, PDF (4/16 Pages) Texas Instruments – High-Speed CMOS Logic Quad Bilateral Switch

CD74HC4016
DC Electrical Specifications (Continued)
TEST CONDITIONS
25^oC
PARAMETER
Quiescent Device
Current
I_O = 0mA
SYMBOL V_I (V)
I_CC
V_CC or
GND
V_IS (V) V_CC (V) MIN
V_CC or
6
-
GND
10
-
TYP MAX
-
2
-
16
-40^oC TO 85^oC
MIN MAX
-
20
-
160
-55^oC TO 125^oC
MIN MAX UNITS
-
40
µA
-
320
µA
Switching Specifications Input t_r, t_f = 6ns
PARAMETER
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
TEST
V_CC
SYMBOL CONDITIONS (V) MIN TYP MAX MIN MAX MIN MAX UNITS
HC TYPES
Propagation Delay,
Switch In to Switch Out
t_PLH, t_PHL C_L = 50pF
2
-
- 60
-
75
-
90
ns
4.5 -
-
12
-
15
-
18
ns
C_L = 15pF
5
-
4
-
-
-
-
-
ns
C_L = 50pF
6
-
- 10
-
13
-
15
ns
9
-
-
8
-
10
-
12
ns
Propagation Delay,
Switch Turn-On En to Out
t_PZH, t_PZL C_L = 50pF
2
-
- 190
-
240
-
285
ns
4.5 -
-
38
-
48
-
57
ns
C_L = 15pF
5
- 16 -
-
-
-
-
ns
C_L = 50pF
6
-
- 32
-
41
-
48
ns
9
-
- 28
-
35
-
42
ns
Propagation Delay,
Switch Turn-Off En to Out
t_PHZ, t_PLZ C_L = 50pF
2
-
- 145
-
180
-
220
ns
4.5 -
-
29
-
36
-
44
ns
C_L = 15pF
5
- 12 -
-
-
-
-
ns
C_L = 50pF
6
-
- 25
-
31
-
38
ns
9
-
- 22
-
28
-
33
ns
Input Capacitance
Power Dissipation Capacitance
(Notes 2, 3)
C_I
C_PD
-
-
-
-
10
-
10
-
10
pF
-
5
- 12 -
-
-
-
-
pF
NOTES:
2. C_PD is used to determine the dynamic power consumption, per package.
3. P_D = C_PD V_CC2 f_i + Σ (C_L + C_S) V_CC2 f_o where f_i = input frequency, f_o = output frequency, C_L = output load capacitance, C_S = switch
capacitance, V_CC = supply voltage.
Analog Channel Specifications T_A = 25^oC
PARAMETER
Switch Frequency Response Bandwidth at -3dB
Figure 3
Crosstalk Between Any Two Switches, Figure 4
Total Harmonic Distortion
TEST CONDITIONS
Figure 6, Notes 4, 5
Figure 5, Notes 5, 6
1kHz, V_IS = 4V_P-P
Figure 7
1kHz, V_IS = 8V_P-P
Figure 7
V_CC (V)
4.5
4.5
4, 5
9
CD74HC4016
>200
TBE
0.078
0.018
UNITS
MHz
dB
%
%
4