CD74HC4016_15 Datasheet, PDF (3/16 Pages) Texas Instruments – High-Speed CMOS Logic Quad Bilateral Switch

CD74HC4016
Absolute Maximum Ratings
DC Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I_IK
For V_I < -0.5V or V_I > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA
DC Drain Current, per Output, I_O
For -0.5V < V_O < V_CC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±25mA
DC Output Diode Current, I_OK
For V_O < -0.5V or V_O > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I_O
For V_O > -0.5V or V_O < V_CC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC V_CC or Ground Current, I_CC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA
Thermal Information
Thermal Resistance (Typical, Note 1)
θ_JA (^oC/W)
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . .
80
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . .
86
PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . .
96
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150^oC
Maximum Storage Temperature Range . . . . . . . . . .-65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300^oC
Operating Conditions
Temperature Range, T_A . . . . . . . . . . . . . . . . . . . . . . -55^oC to 125^oC
Supply Voltage Range, V_CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 10V
DC Input or Output Voltage, V_I, V_O . . . . . . . . . . . . . . . . . 0V to V_CC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
9V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implie
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
TEST CONDITIONS
25^oC
PARAMETER
HC TYPES
SYMBOL V_I (V) V_IS (V) V_CC (V) MIN TYP MAX
High Level Input
Voltage
V_IH
-
-
2
1.5 -
-
4.5 3.15 -
-
6
4.2 -
-
Low Level Input
Voltage
V_IL
-
-
2
-
- 0.5
4.5
-
- 1.35
6
-
- 1.8
“ON” Resistance
I_O = 1mA
R_ON
V_IH or V_CC or 4.5
V_IL
GND
6
-
45 180
-
35 160
9
-
30 135
4.5
-
85 320
6
-
55 240
9
-
35 170
Maximum “ON”
Resistance Between
Any Two Switches
∆R_ON V_IL or V_CC or 4.5
V_IH
GND
6
-
10
-
- 8.5 -
Switch Off Leakage
Current
I_IZ
En = V_CC or
6
-
- ±0.1
GND GND
10
-
- ±0.1
Logic Input Leakage
Current
I_I
V_CC or
-
GND
6
-
- ±0.1
-40^oC TO 85^oC
MIN MAX
1.5
-
3.15
-
4.2
-
-
0.5
-
1.35
-
1.8
-
225
-
200
-
170
-
400
-
300
-
215
-
-
-
-
-
±1
-
±1
-
±1
-55^oC TO 125^oC
MIN MAX UNITS
1.5
-
V
3.15
-
V
4.2
-
V
-
0.5
V
-
1.35
V
-
1.8
V
-
270
Ω
-
240
Ω
-
205
Ω
-
480
Ω
-
360
Ω
-
255
Ω
-
-
Ω
-
-
Ω
-
±1
µA
-
±1
µA
-
±1
µA
3