DRV10987 Datasheet, PDF (39/69 Pages) Texas Instruments – DRV10987 12- to 24-V, Three-Phase, Sensorless BLDC Motor Driver

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DRV10987
SLVSE89 – AUGUST 2017
Motor phase
driving voltage
FGCycle = 0000
2 pole
FGCycle = 0001
4 pole
FGCycle = 0010
6 pole
FGCycle = 0011
8 pole
Figure 38. FG Frequency Divider
8.4.11.2 FG Open-Loop and Lock Behavior
Note that the FG output reflects the driving state of the motor. During normal closed-loop behavior, the driving
state and the actual state of the motor are synchronized. During open-loop acceleration, however, this may not
reflect the actual motor speed. During a locked-motor condition, the FG output is driven high.
The DRV10987 device provides three options for controlling the FG output during open loop, as shown in
Figure 39. The selection of these options is determined by the FGOLSel[1:0] setting.
• Option0: Open-loop, FG output based on driving frequency
• Option1: Open-loop, no FG output (keep high)
• Option2: FG output based on driving frequency at the first power-on start-up, and no FG output (keep high)
for any subsequent restarts
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