DRV10987 Datasheet, PDF (30/69 Pages) Texas Instruments – DRV10987 12- to 24-V, Three-Phase, Sensorless BLDC Motor Driver

DRV10987
SLVSE89 – AUGUST 2017
www.ti.com
8.4.6.1 Half-Cycle Control and Full-Cycle Control
The estimated BEMF used to control the drive state of the motor has two zero-crosses every electrical cycle. The
DRV10987 device can be configured to update the drive state either once every electrical cycle or twice for every
electrical cycle. When AdjMode is programmed to 1, half-cycle adjustment is applied. The control logic is
triggered at both the rising edge and falling edge. When AdjMode is programmed to 0, full-cycle adjustment is
applied. The control logic is triggered only at the rising edge (see Figure 23).
Half-cycle adjustment provides a faster response when compared with full-cycle adjustment. Use half-cycle
adjustment whenever the application requires operation over large dynamic loading conditions. Use the full-cycle
adjustment for low-current (<1 A) applications because it offers more tolerance for current-measurement offset
errors.
Zero cross signal
Zero cross signal
Estimated Position
Real Driving Voltage
Real Position
Ideal Driving Voltage
Adjustment (full cycle)
Estimated Position
Real Driving Voltage
Real Position
Ideal Driving Voltage
Adjustment (half cycle)
Figure 23. Closed-Loop Control Commutation-Adjustment Mode
8.4.6.2 Analog-Mode Speed Control
The SPEED input pin can be configured to operate as an analog input (SpdCtrlMd = 0).
When configured for analog mode, the voltage range on the SPEED pin can be varied from 0 to V3P3. If
SPEED > V_{ANA_FS}, the speed command is maximum. If V_{ANA_ZS} ≤ SPEED < V_{ANA_FS} the speed command
changes linearly according to the magnitude of the voltage applied at the SPEED pin. If SPEED < V_{ANA_ZS} the
speed command is to stop the motor. Figure 24 shows the speed command when operating in analog mode.
Speed
Command
Maximum
Speed
Command
V_ANA-ZS
V_ANA-FS
Analog Input
Figure 24. Analog-Mode Speed Command
8.4.6.3 Digital PWM-Input-Mode Speed Control
If SpdCtrlMd = 1, the SPEED input pin is configured to operate as a PWM-encoded digital input. The PWM duty
cycle applied to the SPEED pin can be varied from 0 to 100%. The speed command is proportional to the PWM
input duty cycle. The speed command stops the motor when the PWM input keeps at 0 for t_{EN_SL_SB} (see
Figure 25).
The frequency of the PWM input signal applied to the SPEED pin is defined as f_PWM. This is the frequency the
device can accept to control motor speed. It does not correspond to the PWM output frequency that is applied to
the motor phase. The PWM output frequency can be configured to be either 25 kHz when the PWMFreq bit is set
to 0 or to 50 kHz when PWMFreq bit is set to 1.
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