TM4C123BH6PM Datasheet, PDF (345/1277 Pages) Texas Instruments – Tiva TM4C123BH6PM Microcontroller

Tiva^™ TM4C123BH6PM Microcontroller
Register 68: Pulse Width Modulator Run Mode Clock Gating Control
(RCGCPWM), offset 0x640
The RCGCPWM register provides software the capability to enable and disable the PWM modules
in Run mode. When enabled, a module is provided a clock and accesses to module registers are
allowed. When disabled, the clock is disabled to save power and accesses to module registers
generate a bus fault. This register provides the same capability as the legacy Run Mode Clock
Gating Control Register n RCGCn registers specifically for the watchdog modules and has the
same bit polarity as the corresponding RCGCn bits.
Important: This register should be used to control the clocking for the PWM modules. To support
legacy software, the RCGC0 register is available. A write to the PWM bit in the RCGC0
register also writes the R0 bit in this register. If the PWM bit is changed by writing to the
RCGC0 register, it can be read back correctly with a read of the RCGC0 register.
Software must use this register to support modules that are not present in the legacy
registers. If software uses this register to write to R0, the write causes proper operation,
but the value of that bit is not reflected in the PWM bit in the RCGC0 register. If software
uses both legacy and peripheral-specific register accesses, the peripheral-specific
registers must be accessed by read-modify-write operations that affect only peripherals
that are not present in the legacy registers. In this manner, both the peripheral-specific
and legacy registers have coherent information.
Pulse Width Modulator Run Mode Clock Gating Control (RCGCPWM)
Base 0x400F.E000
Offset 0x640
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
R1
R0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:2
1
Name
reserved
R1
Type
RO
RW
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM Module 1 Run Mode Clock Gating Control
Value Description
0 PWM module 1 is disabled.
1 Enable and provide a clock to PWM module 1 in Run mode.
0
R0
RW
0
PWM Module 0 Run Mode Clock Gating Control
Value Description
0 PWM module 0 is disabled.
1 Enable and provide a clock to PWM module 0 in Run mode.
June 12, 2014
345
Texas Instruments-Production Data