LMX2571 Datasheet, PDF (34/61 Pages) Texas Instruments – Low-Power, High-Performance PLLatinum RF Synthesizer

LMX2571
SNAS654 – MARCH 2015
8 Application and Implementation
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NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Direct Digital FSK Modulation
In fractional mode, the finest delta frequency difference between two programmable output frequencies is equal
to
f₁ – f₂ = Δf_min = f_PD * {[(N + 1) / DEN] – (N / DEN)} = f_PD / DEN
(3)
In other words, when the fractional numerator is incremented by 1 (one step), the output frequency will change
by Δf_min. A two steps increment will therefore change the frequency by 2 * Δf_min.
In FSK operation, the instantaneous carrier frequency is kept changing among some pre-defined frequencies. In
general, the instantaneous carrier frequency is defined as a certain frequency deviation from the nominal carrier
frequency. The frequency deviation could be positive and negative.
Nominal
carrier
frequency
Instantaneous
carrier
frequency
4FSK symbol: 11 10 00 01
Frequency
Negative
swing
f_DEV0
f_DEV1
Positive
swing
Figure 50. General FSK Definition
Figure 51. Typical 4FSK Definition
The following equations define the number of steps required for the desired frequency deviation with respect to
the nominal carrier frequency output at the RFoutTx or RFoutRx port.
POLARITY
Table 31. FSK Step Equations
SYNTHESIZER MODE
PLL MODE
POSITIVE SWING
Round
f_DEV * DEN
f_PD
CHDIV1 * CHDIV2
*
Prescaler
Round
(4)
f_DEV * DEN
f_PD
* ^CHDIV3
(5)
NEGATIVE SWING _{2's complement of Equation 4}
(6) 2's complement of Equation 5
(7)
In FSK PIN mode and FSK SPI mdoe, register R25-32 and R9-16 are used to store the desired FSK frequency
deviations in term of the number of step as defined in the above equations. The order of the registers, 0 to 7,
depends on the application system. A typical 4FSK definition is shown in Figure 51. In this case, FSK_DEV0_Fx
and FSK_DEV1_Fx shall be calculated using Equation 4 or Equation 5 while FSK_DEV2_Fx and FSK_DEV3_Fx
shall be calculated using Equation 6 or Equation 7.
For example, if FSK PIN mode is enabled in F1 to support 4FSK modulation, set
FSK_MODE_SEL1 = 0
FSK_MODE_SEL0 = 0
FSK_LEVEL = 2
FSK_EN_F1 = 1
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