BQ27541-V200_17 Datasheet, PDF (34/46 Pages) Texas Instruments – Single Cell Li-Ion Battery Fuel Gauge for Battery Pack Integration

bq27541-V200
Not Recommended for New Designs
SLUSA11B – FEBRUARY 2010 – REVISED SEPTEMBER 2013
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I²C INTERFACE
The fuel gauge supports the standard I²C read, incremental read, one-byte write quick read, and functions. The
7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The 8-bit
device address is therefore 0xAA or 0xAB for write or read, respectively.
Host Generated
Fuel Gauge Generated
S ADDR[6:0] 0 A CMD[7:0]
A DATA[7:0]
(a)
AP
S ADDR[6:0] 1 A DATA[7:0] N P
(b)
S ADDR[6:0] 0 A CMD[7:0]
A Sr ADDR[6:0]
(c)
1A
DATA[7:0]
NP
S ADDR[6:0] 0 A CMD[7:0]
A Sr ADDR[6:0]
(d)
1A
DATA[7:0]
A . . . DATA[7:0] N P
Figure 4. Supported I²C formats: (a) 1-byte write, (b) quick read, (c) 1 byte-read, and (d) incremental read
(S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge, and P = Stop).
The "quick read" returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the bq27541 or the I2C
master. "Quick writes" function in the same manner and are a convenient means of sending multiple bytes to
consecutive command locations (such as two-byte commands that require two bytes of data).
Attempt to write a read-only address (NACK after data sent by master):
S ADDR[6:0] 0 A CMD[7:0]
A DATA[7:0]
AP
Attempt to read an address above 0x7F (NACK command):
S
ADDR[6:0]
0 A CMD[7:0] N P
Attempt at incremental writes (NACK all extra data bytes sent):
S ADDR[6:0] 0 A CMD[7:0] A DATA[7:0]
A DATA[7:0] N _{. . .} N P
Incremental read at the maximum allowed read address:
S ADDR[6:0] 0 A CMD[7:0]
A Sr ADDR[6:0] 1 A DATA[7:0]
A . . . DATA[7:0] N P
Address
0x7F
Data From
addr 0x7F
Data From
addr 0x00
The I²C engine releases both SDA and SCL if the I²C bus is held low for t_(BUSERR). If the fuel gauge was holding
the lines, releasing them frees the master to drive the lines. If an external condition is holding either of the lines
low, the I²C engine enters the low-power sleep mode.
I²C Time Out
The I2C engine will release both SDA and SCL if the I2C bus is held low for about 2 seconds. If the bq27541
was holding the lines, releasing them will free for the master to drive the lines.
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