BQ27541-V200_17 Datasheet, PDF (33/46 Pages) Texas Instruments – Single Cell Li-Ion Battery Fuel Gauge for Battery Pack Integration

Not Recommended for New Designs
bq27541-V200
www.ti.com
SLUSA11B – FEBRUARY 2010 – REVISED SEPTEMBER 2013
HDQ SINGLE-PIN SERIAL INTERFACE
The HDQ interface is an asynchronous return-to-one protocol where a processor sends the command code to
the bq27541. With HDQ, the least significant bit (LSB) of a data byte (command) or word (data) is transmitted
first. Note that the DATA signal on pin 12 is open-drain and requires an external pull-up resistor. The 8-bit
command code consists of two fields: the 7-bit HDQ command code (bits 0–6) and the 1-bit R/W field (MSB
bit 7). The R/W field directs the bq27541 either to
• Store the next 8 or 16 bits of data to a specified register or
• Output 8 bits of data from the specified register
The HDQ peripheral can transmit and receive data as either an HDQ master or slave.
HDQ serial communication is normally initiated by the host processor sending a break command to the bq27541.
A break is detected when the DATA pin is driven to a logic-low state for a time t_(B) or greater. The DATA pin
should then be returned to its normal ready high logic state for a time t_(BR). The bq27541 is now ready to receive
information from the host processor.
The bq27541 is shipped in the I2C mode. TI provides tools to enable the HDQ peripheral.
HDQ HOST INTERRUPTION FEATURE
The default bq27541 behaves as an HDQ slave only device. If the HDQ interrupt function is enabled, the
bq27541 is capable of mastering and also communicating to a HDQ device. There is no mechanism for
negotiating who is to function as the HDQ master and care must be taken to avoid message collisions. The
interrupt is signaled to the host processor with the bq27541 mastering an HDQ "message". This message is a
fixed message that will be used to signal the interrupt condition. The message itself is 0x80 (slave write to
register 0x00) with no data byte being sent as the command is not intended to convey any status of the interrupt
condition. The HDQ interrupt function is not public and needs to be enabled by command.
When the SET_HDQINTEN subcommand is received, the bq27541 will detect any of the interrupt conditions and
assert the interrupt at one second intervals until the CLEAR_HDQINTEN command is received or the count of
HDQHostIntrTries has lapsed.
The number of tries for interrupting the host will be determined by a hidden data flash parameter named
Configuration.Register.HDQHostIntrTries.
Low Battery Capacity
This feature will work identically to SOC1. It will use the same data flash entries as SOC1 and will trigger
interrupts as long as SOC1 = 1.
Temperature
This feature will trigger an interrupt based on the OTC (Over-Temperature in Charge) or OTD (Over-Temperature
in Discharge) condition being met. It uses the same data flash entries as OTC or OTD and will trigger interrupts
as long as either the OTD or OTC condition is met and HDQIntEN=1.
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