ADS58B19IRGZT Datasheet, PDF (34/69 Pages) Texas Instruments – 11-Bit, 200MSPS/9-Bit, 250MSPS, Ultralow-Power ADCs with Analog Buffer

ADS58B18
ADS58B19
SBAS487D – NOVEMBER 2009 – REVISED JANUARY 2011
www.ti.com
TYPICAL CHARACTERISTICS: ADS58B18 (continued)
At +25°C, AVDD = 1.8V, AVDD_BUF = 3.3V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock,
1.5V_PP differential clock amplitude, 50% clock duty cycle, –1dBFS differential analog input, DDR LVDS output interface, and
32k-point FFT, unless otherwise noted.
FFT FOR 150MHz INPUT SIGNAL
(SNRBoost Enabled, 30MHz Bandwidth)
FFT FOR 150MHz INPUT SIGNAL
(SNRBoost Enabled, 30MHz Bandwidth)
0
A_IN = −1dBFS
−10 SFDR = 89.5dBc
SNR = 72.2dBFS
−20 _{SINAD = 72dBFS}
THD = 85.9dBc
−30 _{Coeff1 = 0xd}
−40
Coeff2 = 0x3
BW = 35MHz to 65MHz
−50
0
A_IN = −40dBFS
−10 SFDR = 57.3dBc
SNR = 75.6dBFS
−20 _{SINAD = 75.6dBFS}
THD = 55.2dBc
−30 _{Coeff1 = 0xd}
−40
Coeff2 = 0x3
BW = 35MHz to 65MHz
−50
−60
−60
−70
−70
−80
−80
−90
−90
−100
−100
−110
−110
−120
0
20
40
60
80
100
−120
0
20
40
60
80
100
Frequency (MHz)
Figure 22.
Frequency (MHz)
Figure 23.
SFDR ACROSS INPUT FREQUENCY
95
SNR ACROSS INPUT FREQUENCY
67
90
85
66
80
75
65
70
65
64
60
55
0 50 100 150 200 250 300 350 400 450 500
Input Frequency (MHz)
Figure 24.
63
0 50 100 150 200 250 300 350 400 450 500
Input Frequency (MHz)
Figure 25.
34
Submit Documentation Feedback
Product Folder Link(s): ADS58B18 ADS58B19
© 2009–2011, Texas Instruments Incorporated