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TMS320C5517_16 Datasheet, PDF (33/197 Pages) Texas Instruments – TMS320C5517 Fixed-Point Digital Signal Processor
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TMS320C5517
SPRS727C – AUGUST 2012 – REVISED APRIL 2014
SIGNAL
NAME
USB_R1
USB_VSSREF
USB_VDDA3P3
USB_VSSA3P3
USB_VDDA1P3
USB_VSSA1P3
USB_VDD1P3
USB_VSS1P3
Table 4-11. USB2.0 Signal Descriptions (continued)
NO.
TYPE (1)
(2)
OTHER (3) (4)
DESCRIPTION
External resistor connect. Reference current output. This pin must be connected via
a 10-kΩ ±1% resistor to USB_VSSREF and be placed as close to the device as
G9
A I/O USB_VDDA3P3 possible.
When the USB peripheral is not used, the USB_R1 signal should be connected via
a 10-kΩ resistor to USB_VSSREF.
Ground for reference current. This must be connected via a 10-kΩ ±1% resistor to
see
USB_R1.
G10 GND Section 5.2,
ROC
When the USB peripheral is not used, the USB_VSSREF signal should be connected
directly to ground (Vss).
Analog 3.3 V power supply for USB PHY.
see
This signal must be powered on in the order listed in Section 5.7.2.2, Power-Supply
H12
S
Section 5.2, Sequencing.
ROC
When the USB peripheral is not used, the USB_VDDA3P3 signal should be
connected to ground (VSS).
see
H11 GND Section 5.2, Analog ground for USB PHY.
ROC
Analog 1.3 V power supply for USB PHY. [For high-speed sensitive analog circuits]
see
This signal must be powered on in the order listed in Section 5.7.2.2, Power-Supply
H10
S
Section 5.2, Sequencing.
ROC
When the USB peripheral is not used, the USB_VDDA1P3 signal should be
connected to ground (VSS).
see
H9 GND Section 5.2, Analog ground for USB PHY [For high speed sensitive analog circuits].
ROC
1.3-V digital core power supply for USB PHY.
see
This signal must be powered on in the order listed in Section 5.7.2.2, Power-Supply
J13
S
Section 5.2, Sequencing.
ROC
When the USB peripheral is not used, the USB_VDD1P3 signal should be connected
to ground (VSS).
see
H13 GND Section 5.2, Digital core ground for USB PHY.
ROC
USB_VDDPLL
USB_VSSPLL
3.3 V USB Analog PLL power supply.
see
Care should be taken to prevent noise on this supply. Consider using a ferrite bead
G8
S
Section 5.2, if the power supply for this pin is shared with digital logic. See the Filtering
ROC
Techniques Application Report [literature number: SCAA048] for more information.
When the USB peripheral is not used, the USB_VDDPLL signal should be connected
to ground (VSS).
see
G11 GND Section 5.2, USB Analog PLL ground.
ROC
Copyright © 2012–2014, Texas Instruments Incorporated
Terminal Configuration and Functions
33
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