TMS320C5517_16 Datasheet, PDF (127/197 Pages) Texas Instruments – TMS320C5517 Fixed-Point Digital Signal Processor

www.ti.com
TMS320C5517
SPRS727C – AUGUST 2012 – REVISED APRIL 2014
Table 5-45. McSPI Interface Switching Characteristics – Master Mode [I/O = 2.75 V]
NO.
PARAMETER
SM0
SM1
SM4
SM5
SM6
SM7
Clock period
Pulse duration, McSPI_CLK high or low
Delay time, McSPI_CLK active edge to McSPI_SIMO
valid
Delay time, McSPI_CSx active to
McSPI_CLK first edge
Modes 0–3
Delay time, McSPI_CLK last edge to
McSPI_CSx inactive
Modes 0–3
Delay time, McSPI_CSx active edge to Modes 0
McSPI_SIMO shifted
and 2
(1) P = McSPI_CLK clock period
CV_DD = 1.05 V
MIN
MAX
22
0.45*P⁽¹⁾ 0.55*P⁽¹⁾
0
18
CV_DD = 1.3/1.4 V
MIN
MAX
38
0.45*P⁽¹⁾ 0.55*P⁽¹⁾
-1
10
3.1
3.1
3.1
3.1
10
6
UNIT
MHz
ns
ns
ns
ns
ns
Table 5-46. McSPI Interface Switching Characteristics – Master Mode [I/O = 1.8 V]
NO.
PARAMETER
SM0
Clock period
SM1
Pulse duration, McSPI_CLK high or low
SM4
Delay time, McSPI_CLK active edge to
McSPI_SIMO valid
SM5
Delay time, McSPI_CSx active to
McSPI_CLK first edge
Modes 0–3
SM6
Delay time, McSPI_CLK last edge to Modes 0–3
McSPI_CSx inactive
SM7
Delay time, McSPI_CSx active edge to Modes 0
McSPI_SIMO shifted
and 2
(1) P = McSPI_CLK clock period
CV_DD = 1.05 V
MIN
MAX
19
0.45*P⁽¹⁾ 0.55*P⁽¹⁾
0
18.5
2.75
2.75
11
CV_DD = 1.3/1.4 V
MIN
MAX
38
0.45*P⁽¹⁾ 0.55*P⁽¹⁾
-1
10
3
3
5
UNIT
MHz
ns
ns
ns
ns
ns
Copyright © 2012–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TMS320C5517
Specifications 127