TMS320DM8148_13 Datasheet, PDF (323/370 Pages) Texas Instruments – TMS320DM814x DaVinci™Video Processors

TMS320DM8148, TMS320DM8147, TMS320DM8146
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MCA[x]_ACLKR/X (Falling Edge Polarity)
SPRS647D – MARCH 2011 – REVISED SEPTEMBER 2012
MCA[x]_AHCLKR/X (Rising Edge Polarity)
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MCA[x]_ACLKR/X (CLKRP = CLKXP = 0)^(A)
MCA[x]_ACLKR/X (CLKRP = CLKXP = 1)^(B)
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MCA[x]_AFSR/X (Bit Width, 0 Bit Delay)
MCA[x]_AFSR/X (Bit Width, 1 Bit Delay)
MCA[x]_AFSR/X (Bit Width, 2 Bit Delay)
MCA[x]_AFSR/X (Slot Width, 0 Bit Delay)
MCA[x]_AFSR/X (Slot Width, 1 Bit Delay)
MCA[x]_AFSR/X (Slot Width, 2 Bit Delay)
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MCA[x]_AXR[x] (Data In/Receive)
A0 A1
A30 A31 B0 B1
B30 B31 C0 C1 C2 C3
C31
A. For CLKRP = CLKXP = 0, the McASP transmitter is configured for rising edge (to shift data out) and the McASP
receiver is configured for falling edge (to shift data in).
B. For CLKRP = CLKXP = 1, the McASP transmitter is configured for falling edge (to shift data out) and the McASP
receiver is configured for rising edge (to shift data in).
Figure 8-81. McASP Input Timing
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Peripheral Information and Timings 323
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