TMS320DM8148_13 Datasheet, PDF (175/370 Pages) Texas Instruments – TMS320DM814x DaVinci™Video Processors

TMS320DM8148, TMS320DM8147, TMS320DM8146
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6 Device Operating Conditions
SPRS647D – MARCH 2011 – REVISED SEPTEMBER 2012
6.1 Absolute Maximum Ratings ⁽¹⁾⁽²⁾
Supply voltage ranges (Steady
State):
Core (CVDD, CVDD_ARM, CVDD_DSP, CVDD_HDVICP)
I/O, 1.8 V (DVDD_M, DVDD_DDR[0], DVDD_DDR[1], VDDA_1P8,
VDDA_ARMPLL_1P8, VDDA_DSPPLL_1P8, VDDA_VID0PLL_1P8,
VDDA_VID1PLL_1P8, VDDA_AUDIOPLL_1P8, VDDA_DDRPLL_1P8,
VDDA_L3PLL_1P8, VDDA_PCIE_1P8, VDDA_SATA_1P8,
VDDA_HDMI_1P8, VDDA_USB0_1P8, VDDA_USB1_1P8,
VDDA_VDAC_1P8)
I/O 3.3 V (DVDD, DVDD_GPMC, DVDD_GPMCB, DVDD_SD, DVDD_C)
DDR Reference Voltage (VREFSSTL_DDR[0], VREFSSTL_DDR[1])
V I/O, 1.5-V pins (Steady State)
V I/O, 1.5-V pins (Transient Overshoot/Undershoot)
V I/O, 1.8-V pins (Steady State)
Input and Output voltage ranges:
V I/O, 1.8-V pins (Transient Overshoot/Undershoot)
V I/O, 3.3-V pins (Steady State)
V I/O, 3.3-V pins (Transient Overshoot/Undershoot)
Operating junction temperature
range, T_J:
Commercial Temperature
Industrial
Extended
Storage temperature range, T_stg:
Electrostatic Discharge (ESD)
Performance:
ESD-HBM (Human Body Model)⁽³⁾
ESD-CDM (Charged-Device Model)⁽⁴⁾
-0.3 V to 1.5 V
-0.3 V to 2.1 V
-0.3 V to 4.0 V
-0.3 V to 1.1 V
-0.3 V to DVDD_DDR[x] +
0.3 V
30% of DVDD_DDR[x] for up
to 30% of the signal period
-0.3 V to DVDD + 0.3 V
-0.3 V to DVDD_x + 0.3 V
30% of DVDDx for up to
30% of the signal period
-0.3 V to DVDD + 0.3 V
-0.3 V to DVDD_x + 0.3 V
30% of DVDDx for up to
30% of the signal period
0°C to 90°C
-40°C to 90°C
-40°C to 105°C
-55°C to 150°C
±1000 V
±250 V
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to their associated VSS or VSSA_x.
(3) Based on JEDEC JESD22-A114E [Electrostatic Discharge (ESD) Sensitivity Testing Human Body Model (HBM)].
(4) Based on JEDEC JESD22-C101C (Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-Withstand Thresholds
of Microelectronic Components).
Copyright © 2011–2012, Texas Instruments Incorporated
Device Operating Conditions 175
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