PGA460 Datasheet, PDF (32/114 Pages) Texas Instruments – Ultrasonic Signal Processor and Transducer Driver

PGA460
SLASEJ4 – APRIL 2017
www.ti.com
7.3.6.2 USART Interface
7.3.6.2.1 USART Asynchronous Mode
The PGA460 device includes a USART digital communication interface. The main function of the USART is to
enable writes to and reads from all addresses available for USART access. This function include access to most
EEPROM-register and RAM-register memory locations on the PGA460 device. The USART asynchronous-mode
(UART) digital communication is a master-slave communication link in which the PGA460 is a slave device only.
The master device controls when the data transmission begins and ends. The slave device does not transmit
data back to the master device until it is commanded to do so by the master device. A logic 1 value on the UART
interface is defined as a recessive value (weak pullup on the RXD pin). A logic 0 value on the UART interface is
defined as a dominant value (strong pulldown on the RXD pin).
The UART asynchronous-mode interface in PGA460 is designed for data-rates from 2400-bps to 115200-bps
operation, where the data rate is automatically detected based on the sync field produced by the master
controller. Other parameters related to the operation of the UART interface include:
• Baud rate from 2400 bps to 115 200 bps, auto-detected (as previously described)
• 8 data bits
• 1 start bit
• 1 stop bit
• No parity bit
• No flow control
• Interfield wait time (optional)
tBIT_UART
tBIT_UART
tBIT_UART
tBIT_UART
..........
Start
LSB
Bit
D0
D1
D2
D3
D4
D5
D6
MSB
D7
Stop Inter-Byte
Bit
Space
Start
Bit
..........
Figure 20. USART Asynchronous Interface Bit Timing
Figure 20 shows the bit timing for USART asynchronous mode. Both data and control are in little endian format.
Data is transmitted through the UART interface in byte-sized packets. The first bit of the packet field is the start
bit (dominant). The next 8 bits of the field are data bits to be processed by the UART receiver. The final bit in the
field is the stop bit (recessive). The combined byte of information, and the start and stop bits make up an UART
field. Figure 21 shows the standard field structure for a UART interface field.
Standard field
Figure 21. UART Interface Packet Field
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