LP8755_14 Datasheet, PDF (30/51 Pages) Texas Instruments – Multi-Phase 6-Core Step-Down Converter

LP8755
SNVSA20 – NOVEMBER 2013
www.ti.com
FREQUENCY
Where a fixed-frequency converter exhibits large amounts of spectral energy at the switching frequency, the spread
spectrum architecture of the LP8755 spreads that energy over a large bandwidth.
Figure 39. Spread Spectrum Modulation
Power-Up and Output Voltage Sequencing
The power-up sequence for the LP8755 is as follows:
• VINBxx and VDDA5V reach min recommended levels.
• VIOSYS set high. Enables the system I/O interface. For power-on-reset (POR), the I²C host should allow at
least 500 µs before sending data to the LP8755 after the rising edge of the VIOSYS line.
• VLDO voltage is raising. The LDO voltage is generated internally. The internal POR signal is activated.
• Internal POR deasserted, OTP read.
• Device enters standby mode.
• DC/DC enable, output voltage, voltage slew rate programmed over I²C as needed by the application.
• NRTS set high. Once the DC/DC converter is started, it can be enabled or disabled by EN/DIS bit.
V_INBXX
V_IOSYS
LDO
(internal)
NRST
t₀
t₁
t₂
t_I2CT
LP8755 receiving/sending data across the system I2C bus.
Figure 40. Timing Diagram for the Power-Up Sequence
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