SN74ALVCH374_16 Datasheet, PDF (3/17 Pages) Texas Instruments – OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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SN74ALVCH374
OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCES118G – JULY 1997 – REVISED OCTOBER 2004
RECOMMENDED OPERATING CONDITIONS⁽¹⁾
V_CC
Supply voltage
V_IH
High-level input voltage
V_IL
Low-level input voltage
V_I
Input voltage
V_O
Output voltage
I_OH
High-level output current
I_OL
Low-level output current
∆t/∆v
T_A
Input transition rise or fall rate
Operating free-air temperature
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 2.7 V to 3.6 V
V_CC = 1.65 V to 1.95 V
V_CC = 2.3 V to 2.7 V
V_CC = 2.7 V to 3.6 V
V_CC = 1.65 V
V_CC = 2.3 V
V_CC = 2.7 V
V_CC = 3 V
V_CC = 1.65 V
V_CC = 2.3 V
V_CC = 2.7 V
V_CC = 3 V
MIN
1.65
0.65 × V_CC
1.7
2
0
0
-40
MAX UNIT
3.6 V
V
0.35 × V_CC
0.7
0.8
V_CC
V_CC
-4
-12
-12
-24
4
12
12
24
5
85
V
V
V
mA
mA
ns/V
°C
(1) All unused inputs of the device must be held at V_CC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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