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LP3971_16 Datasheet, PDF (3/52 Pages) Texas Instruments – Power Management Unit for Advanced Application Processors
LP3971
www.ti.com
SNVS432V – JANUARY 2006 – REVISED MAY 2013
Li-ion/polymer cell
+
DC SOURCE
4.5 ± 5.5V
See notes
Cvdd
4.7 PF
VIN VDDA
6
27
26 14 31 20
LP3971 PMIC
SYNC
40
35
APPLICATION
PROCESSOR
Cchg_det
4.7 PF
VinBUBATT 15
VoutLDO_RTC
COMP
EOC
Vout
Switch
Clock
divider
BUCK1
BUCK2
PWR_ON 1
GPIO1/nCHG_EN 29
nTEST_JIG 2
GPIO2 30
SPARE 3
nRSTI 9
Internal HW reset for
test purposes
CODEC
VoutLDO2 8
Cldo1
1.0 PF
OSC
Wake up
BUCK3
VIN
LDO1
Power
ON-OFF
Logic
LDO3
RESET
VinLDO4
Logic Control VinLDO5
and registers
LDO4
PWR_EN
LDO5
VIN SYS_EN
LDO2
VDDA
LDORTC
Vout Switch
Power On
Reset
Thermal
I2C
Shutdown
BIAS
vref
VREF
Cvrefh
10 nF
11
38
18
33
PGND1 PGND2 PGND3
34
10
BGND1,2,3 GND1
37 PWR_EN
Lsw1 2.2 PH
39
SW1
VFB1
5
Lsw2 2.2 PH
19
10 PF
VBUCK2
SW2
VFB2
23
Lsw3 2.2 PH
32
SW3
VFB3
28
SYS_EN
10 PF
10 PF
36
VoutLDO1
7
Cldo2
0.47 PF
VoutLDO3
12
Cldo3
0.47 PF
VoutLDO4
13
Cldo4
0.47 PF
VoutLDO5
25
Cldo5
0.47 PF
16 VoutLDO_RTC
CldoRTC
1.0 PF
See notes
3.3V
10k
22 I2C_SCL
10k
21 I2C_SDA
24 nRSTO
4 EXT_WAKEUP
17 nBATT_FLT
• The I2C lines are pulled up via a I/O source
• VINLDO4, 5 can either be powered from main battery source, or by a buck regulator or VIN.
Figure 2.
CPU
CORE
USB
UART
BG
MVT
AP_IO
PLL
SRAM
RTC
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