LP3971_16 Datasheet, PDF (19/52 Pages) Texas Instruments – Power Management Unit for Advanced Application Processors

LP3971
www.ti.com
SNVS432V – JANUARY 2006 – REVISED MAY 2013
During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage
during PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy
load. The PFM comparators sense the output voltage via the feedback pin and control the switching of the output
FETs such that the output voltage ramps between <0.6% and <1.7% above the nominal PWM output voltage. If
the output voltage is below the “high” PFM comparator threshold, the PMOS power switch is turned on. It
remains on until the output voltage reaches the ‘high’ PFM threshold or the peak current exceeds the IPFM level
set for PFM mode. The typical peak current in PFM mode is: IPFM = 112 mA + V_IN/27Ω. Once the PMOS power
switch is turned off, the NMOS power switch is turned on until the inductor current ramps to zero. When the
NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output voltage is below the
‘high’ PFM comparator threshold (see Figure 18), the PMOS switch is again turned on and the cycle is repeated
until the output reaches the desired level. Once the output reaches the ‘high’ PFM threshold, the NMOS switch is
turned on briefly to ramp the inductor current to zero and then both output switches are turned off and the part
enters an extremely low power mode. Quiescent supply current during this ‘sleep’ mode is 21 μA (typ), which
allows the part to achieve high efficiencies under extremely light load conditions. When the output drops below
the ‘low’ PFM threshold, the cycle repeats to restore the output voltage (average voltage in PFM mode) to
<1.15% above the nominal PWM output voltage. If the load current should increase during PFM mode (see
Figure 18) causing the output voltage to fall below the ‘low2’ PFM threshold, the part will automatically transition
into fixed-frequency PWM mode. Typically when V_IN = 3.6V the part transitions from PWM to PFM mode at 100
mA output current .
PFM Mode at Light Load
Pfet on
until
Ipfm limit
reached
Nfet on
drains
conductor
current
until
I inductor=0
High PFM
Voltage
Threshold
reached,
go into
sleep mode
Low PFM
Threshold,
turn on
PFET
High PFM Threshold
~1.017*Vout
Load current
increases
Current load
increases,
draws Vout
towards
Low2 PFM
Threshold
Low1 PFM Threshold
~1.006*Vout
Low2 PFM Threshold
Vout
Low2 PFM Threshold,
switch back to PWMmode
PWM Mode at
Moderate to Heavy
Loads
Figure 18. Operation in PFM Mode and Transfer to PWM Mode
SHUTDOWN MODE
During shutdown the PFET switch, reference, control and bias circuitry of the converters are turned off. The
NFET switch will be open in shutdown to discharge the output. When the converter is enabled, EN, soft start is
activated. It is recommended to disable the converter during the system power up and undervoltage conditions
when the supply is less than 2.7V.
SOFT START
The buck converter has a soft-start circuit that limits in-rush current during start-up. During start-up the switch
current limit is increased in steps. Soft start is activated only if EN goes from logic low to logic high after V_IN
reaches 2.7V. Soft start is implemented by increasing switch current limit in steps of 213 mA, 425 mA, 850 mA
and 1700 mA (typ. Switch current limit). The start-up time thereby depends on the output capacitor and load
current demanded at start-up. Typical start-up times with 10 μF output capacitor and 1000 mA load current is 390
μs and with 1 mA load current is 295 μs.
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