DS91M125_13 Datasheet, PDF (3/17 Pages) Texas Instruments – 125 MHz 1:4 M-LVDS Repeater with LVDS Input

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Logic Diagram
Number
1, 2, 3, 8
6
7
5
10, 11, 14, 15
9, 12, 13, 16
4
Name
DE
DI+
DI-
GND
A
B
V_DD
DS91M125
SNLS290C – AUGUST 2008 – REVISED APRIL 2013
DE0
B0
A0
DE1
B1
A1
DI+
DI-
B2
A2
DE2
B3
A3
DE3
PIN DESCRIPTIONS
I/O, Type
Description
I, LVCMOS
Driver enable pins: When DE is low, the driver is disabled. When DE is high,
the driver is enabled. There is a 300 kΩ pulldown resistor on each pin.
I, LVDS
Non-inverting receiver input pin.
I, LVDS
Inverting receiver input pin.
Power
Ground pin.
O, M-LVDS Non-inverting driver output pin.
O, M-LVDS Inverting driver output pin.
Power
Power supply pin, +3.3V ± 0.3V
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