DS90CF363B_13 Datasheet, PDF (3/15 Pages) Texas Instruments – +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

DS90CF363B
www.ti.com
SNLS180D – JULY 2004 – REVISED APRIL 2013
Electrical Characteristics⁽¹⁾ (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
I_OZ
Output TRI-STATE Current
TRANSMITTER SUPPLY CURRENT
Power Down = 0V,
V_OUT = 0V or V _CC
ICCTW Transmitter Supply Current
Worst Case
ICCTG
Transmitter Supply Current
16 Grayscale
ICCTZ
Transmitter Supply Current
Power Down
R_L = 100Ω,
C_L = 5 pF,
Worst Case Pattern
f = 25 MHz
f = 40 MHz
(Figure 2 and Figure 5 ) " f = 65 MHz
Typ " values are given for
V _CC = 3.6V and T _A =
+25°C, " Max " values are
given for V _CC = 3.6V and T
A ^{= −10°C}
R_L = 100Ω,
C_L = 5 pF,
16 Grayscale Pattern
f = 25 MHz
f = 40 MHz
(Figure 3 and Figure 5 ) " f = 65 MHz
Typ " values are given for
V _CC = 3.6V and T _A =
+25°C, " Max " values are
given for V _CC = 3.6V and T
A ^{= −10°C}
Power Down = Low
Driver Outputs in TRI-STATE under
Power Down Mode
Min Typ⁽²⁾
±1
Max
±10
Units
μA
29
40
mA
34
45
mA
42
55
mA
28
40
mA
32
45
mA
39
50
mA
11
150
μA
Recommended Transmitter Input Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
TCIT
TxCLK IN Transition Time (Figure 6 )
TCIP
TxCLK IN Period (Figure 7 )
TCIH
TxCLK IN High Time (Figure 7 )
TCIL
TxCLK IN Low Time (Figure 7 )
TXIT
TxIN, and Power Down pin transition Time
TXPD
Minimum pulse width for Power Down pin signal
Min
14.7
0.35T
0.35T
1.5
1
Typ
T
0.5T
0.5T
Max
5
50.0
0.65T
0.65T
6.0
Units
ns
ns
ns
ns
ns
us
Transmitter Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
Min
LLHT
LVDS Low-to-High Transition Time (Figure 5 )
LHLT
TPPos0
TPPos1
LVDS High-to-Low Transition Time (Figure 5 )
Transmitter Output Pulse Position for Bit 0 (Figure 12 )⁽¹⁾
Transmitter Output Pulse Position for Bit 1
f = 65
MHz
−0.20
2.00
TPPos2 Transmitter Output Pulse Position for Bit 2
4.20
TPPos3 Transmitter Output Pulse Position for Bit 3
6.39
TPPos4 Transmitter Output Pulse Position for Bit 4
8.59
TPPos5 Transmitter Output Pulse Position for Bit 5
10.70
TPPos6 Transmitter Output Pulse Position for Bit 6
12.99
Typ
0.75
0.75
0
2.20
4.40
6.59
8.79
10.99
13.19
Max
1.4
1.4
+0.20
2.40
4.60
6.79
8.99
11.19
13.39
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1) The Minimum and Maximum Limits are based on statistical analysis of the device performance over process, voltage, and temperature
ranges. This parameter is functionality tested only on Automatic Test Equipment (ATE).
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