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5962-9583401Q2A Datasheet, PDF (3/19 Pages) Texas Instruments – DS90C032QML LVDS Quad CMOS Differential Line Receiver
DS90C032QML
www.ti.com
SNLS203D – MARCH 2006 – REVISED APRIL 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)
Supply Voltage (VCC)
Input Voltage (RI+, RI−)
Enable Input Voltage (EN, EN*)
Output Voltage (RO)
Storage Temperature Range (TStg)
Maximum Lead Temperature, Soldering (4 seconds)
Maximum Package Power Dissipation at +25°C(2)
LCCC Package
CLGA (NAD)
CLGA (NAC)
Thermal Resistance
θJA
LCCC Package
CLGA (NAD)
CLGA (NAC)
θJC
LCCC Package
CLGA (NAD)
CLGA (NAC)
ESD Rating(3)
−0.3V to +6V
−0.3V to +5.8V
−0.3V to (VCC +0.3V)
−0.3V to (VCC +0.3V)
−65°C ≤ TA ≤ +150°C
+260°C
1830 mW
1400 mW
1400 mW
82°C/W
145°C/W
145°C/W
20°C/W
20°C/W
20°C/W
2KV
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
(2) Derate LCCC at 12.2mW/°C above +25°C. Derate CLGA at 6.8mW/°C above +25°C
(3) Human body model, 1.5 kΩ in series with 100 pF.
Recommended Operating Conditions
Supply Voltage (VCC)
Receiver Input Voltage
Operating Free Air Temperature (TA)
Min
+4.5V
Gnd
−55°C
Typ
+5.0V
+25°C
Max
+5.5V
2.4V
+125°C
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