5962-9583401Q2A Datasheet, PDF (1/19 Pages) Texas Instruments – DS90C032QML LVDS Quad CMOS Differential Line Receiver

DS90C032QML
www.ti.com
SNLS203D – MARCH 2006 – REVISED APRIL 2013
DS90C032QML LVDS Quad CMOS Differential Line Receiver
Check for Samples: DS90C032QML
FEATURES
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•2 Single Event Latchup (SEL) Immune 120 MeV-
cm²/mg
• High Impedance LVDS Inputs with Power-Off.
• Accepts Small Swing (330 mV) Differential
Signal Levels
• Low Power Dissipation
• Low Differential Skew
• Low Chip to Chip Skew
• Pin Compatible with DS26C32A
• Compatible with IEEE 1596.3 SCI LVDS
Standard
DESCRIPTION
The DS90C032 is a quad CMOS differential line
receiver designed for applications requiring ultra low
power dissipation and high data rates.
The DS90C032 accepts low voltage differential input
signals and translates them to CMOS (TTL
compatible) output levels. The receiver supports a
TRI-STATE function that may be used to multiplex
outputs. The receiver also supports OPEN Failsafe
and terminated (100Ω) input Failsafe with the addition
of external failsafe biasing. Receiver output will be
HIGH for both Failsafe conditions.
The DS90C032 provides power-off high impedance
LVDS inputs. This feature assures minimal loading
effect on the LVDS bus lines when VCC is not
present.
The DS90C032 and companion line driver
(DS90C031) provide a new alternative to high power
pseudo-ECL devices for high speed point-to-point
interface applications.
Connection Diagrams
Figure 1. Dual-In-Line
See Package Number NAD0016A & NAC0016A
Figure 2. LCCC Package
See Package Number NAJ0020A
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2
PRODUCTION DATA information is current as of publication date.
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